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In order to understand the degradation of the electrical operations of metal-oxidesemiconductor (MOS) devices, this work is concerned by the defects generation processes in the non-stoichiometric SiO, area and at the SiO2 interface. For this purpose, a new measurement technique to study slow-state traps and their relationship with fast-state traps is developed. This method considers capacitancevoltage measurements and temperature effects during the hysteresis cycle.

The present experiments are intended to help characterize defects in very thin MOS oxide and at its Si/SiO2 interface using a temperature‐dependent electrical characterization method, high low temperature capacitance voltage method and, especially, to investigate high temperature range. Oxide‐fixed traps are differentiated from slow‐state traps and from fast‐state traps by evaluating their electrical behaviour at different temperatures. The analysis points out the excess current after Fowler Nordheim electron injection based on hole generation, trapping, and hopping transport at high temperatures. The defect relaxation property versus temperature is investigated and defect relaxation activation energies are calculated. Creation mechanisms of interface states are especially identified by injection at different temperatures and these are compared with the other two kinds of defects. Fast‐state traps and all defect cross‐sections are calculated along and their creation activation energies are determined from Arrhenius plots.

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