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A SAW-less receiver front-end with an active adjustable feedback loop for blocker-filtering is presented. By simply tuning the gain of loop amplifier, the −3 dB intermediate frequency (IF) bandwidth can be configured from 1 to 15 MHz continuously only using 46 pF capacitors. Moreover, the blocker current at low-noise amplifier (LNA) output can be effectively absorbed by the auxiliary capacitor and the loop amplifier buffer. The front-end operates from 0.1 to 2.5 GHz with maximal out-of-band rejection of 38 dB at 100 MHz offset frequency and it achieves 7-dBm out-of-band input third intercept point (IIP3). The design is implemented in 0.13 µm BiCMOS process.

This paper presents a new multi-stage noise-shaping (MASH) digital delta-sigma modulator (DDSM), denoted as HJ-MASH DDSM which can remove spurs in the output spectrum and has long sequence lengths than Jinook structure and HK-MASH in the worst input case by applying HK-EFM in the first stage error feedback modulator (EFM) of the DDSM. In addition, the proposed HJ-MASH DDSM lowers the difficulty of constructing higher order MASH DDSMs compared to HK-MASH DDSM. While the performance and stability are all superior to Jinook structure for all constant inputs, especially for the input which correspond to minimum cycle lengths. The digital delta-sigma modulator applied in fractional-N frequency synthesizers ameliorates the synthesizer's spectral purity apparently by verification.

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A low-voltage inverter-based sigma-delta modulator (SDM) based on a three-phase clock technique is presented. The three-phase clock is proposed to mitigate a performance degradation due to a gate leakage current in advanced process nodes, which reduces noise introduced by the charge injection at the end of a sampling phase and an integrating phase. Simulation results in a 65 nm CMOS process show that the spectrum characteristics of the SDM match well the MATLAB model and achieve 5.1-dB enhancement in the signal-to-noise and distortion ratio performance compared to a traditional inverter-based SDM implementing the uniform loop filter and the same oversampling ratio.