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The switching physics of ferroelectric, series capacitance theory and Pao and Sah’s double integral are used for describing the polarization-voltage (P-V) characteristic of ferroelectric layer, capacitance-voltage (C-V) characteristic of MFMIS capacitor, and drain current-gate voltage (ID-VGS) and drain current-drain voltage (ID-VDS) characteristics of MFMIS FET. The effects of the area ratio on the P-V, C-V, ID-VGS, and ID-VDS characteristics are discussed. The results indicate that with the increase of the area ratio, the P-V characteristic, memory windows of C-V and ID-VGS characteristics become saturated, while the drain current ON/OFF ratio and applied voltage for saturated memory window decrease.

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