An ultra-wideband low noise amplifier(LNA) based on the cascode configuration with resistive feedback is presented in this paper. A shunt-shunt feedback resistor and a pre-π matching network is employed to achieve wideband input impedance matching, and to enhance gain response and reduce noise for using a post-cascode inductor LP. In this paper, the SMIC 40nm CMOS process is used. The circuit simulation results show that S11 is lower than-10dB, and the gain S21 is around 10±2dB,and the NF is lower than 4.5dB in the 3.5-31-GHz frequency range.

A CMOS Ka-band AGC based on 65nm CMOS process is presented in this paper, the Chebyshev band-pass filter is used for filtering the input signal, the Gilbert structure with extended bandwidth technology is selected to for voltage gain amplifier, the current mirror structure composed of MOS tubes is employed for the voltage detector, and the control voltage generator circuit is designed based on the exponential relationship between the voltage and the current of the transistors. The simulation shows with the 1.0V supply voltage, the AGC working frequency range is between 27.5GHz and 31.3GHz, the input range of the automatic gain control circuit is between -20dB ~ 20dB, The overall layout area is around 1.15mm 2 .

A dual-band reconfigurable low noise amplifier(LNA) for T/R module is designed based on SMIC 65nm CMOS process In this paper, the low noise amplifier can operate in L/S band optionally. The simulation results shown it has a larger than 20dB gain and smaller than 2.5dB noise figure for both L and S bands, the IP3 is bigger than -8dBm, the layout of low noise amplifier occupies 1750um*1000um area.