The effects of p-and n-electrode patterning on the current spreading and driving voltage of a side-view GaN/sapphire lightemitting diode ͑LED͒ chip are investigated via a numerical simulation. The numerical results ͑current distributions͒ for the striped pattern p-electrode are well consistent with the optical emission patterns taken from emission images. A desirable uniformity of the current distribution in the active layer can be obtained by the appropriate arrangement of p-and n-electrode patterns. At the same time, a lower voltage drop in the LED chip is also obtained due to a more uniform current distribution in the p-GaN layer and a smaller overall distance for current movement in the n-GaN layer. With an injection current of 30 mA, a decrease in driving voltage of 13% for well-designed electrode patterns can achieve compared to the control devices considered in this study.
The influence of the size of an n-electrode and a current blocking layer (CBL) on the thermal and electrical characteristics of a vertical-injection GaN-based light emitting diode (LED) chip is investigated by numerical simulation. The predicted forward voltages are quite consistent with previous experimental data. The coupled thermal and electrical effects affect the performance of a LED chip. For cases without a CBL, the variation in current density and temperature distributions in the active layer, and the forward voltage and Joule heating percentage of the LED chip increase as the n-electrode width
(L)
decreases. The current crowding and temperature of the hot spot are very significant, although the wall-plug efficiency (WPE) is the highest one obtained for
L=100μm
. The better width of the n-electrode in terms of the uniformity of temperature, current density distribution, WPE, and forward voltage may be the case where
L=200μm
. The insertion of a CBL into a
600×600μm
chip leads to greater uniformity in the distribution of the current density in the effective light-emitting area when
L=500μm
. A more uniform temperature distribution in the active layer occurs when
L=200μm
, while the case when
L=300μm
has the maximum WPE.
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