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Recently, studies have examined techniques for modeling the light distribution of light-emitting diodes (LEDs) for various applications owing to their low power consumption, longevity, and light weight. The energy mapping technique, a design method that matches the energy distributions of an LED light source and target area, has been the focus of active research because of its design efficiency and accuracy. However, these studies have not considered the effects of the emitting area of the LED source. Therefore, there are limitations to the design accuracy for small, high-power applications with a short distance between the light source and optical system. A design method for compensating for the light distribution of an extended source after the initial optics design based on a point source was proposed to overcome such limits, but its time-consuming process and limited design accuracy with multiple iterations raised the need for a new design method that considers an extended source in the initial design stage. This study proposed a method for designing discrete planar optics that controls the light distribution and minimizes the optical loss with an extended source and verified the proposed method experimentally. First, the extended source was modeled theoretically, and a design method for discrete planar optics with the optimum groove angle through energy mapping was proposed. To verify the design method, design for the discrete planar optics was achieved for applications in illumination for LED flash. In addition, discrete planar optics for LED illuminance were designed and fabricated to create a uniform illuminance distribution. Optical characterization of these structures showed that the design was optimal; i.e., we plotted the optical losses as a function of the groove angle, and found a clear minimum. Simulations and measurements showed that an efficient optical design was achieved for an extended source.
Laser interference lithography (LIL) is a technique that allows maskless patterning of large areal periodic nano/micro structures. The LIL pattern is often used as an etch barrier to pattern SiO2 intermediate layer in the fabrication process of high aspect ratio silicon nano/micro structures by deep reactive ion etching process (DRIE) with SiO2 etch barrier. In this study, a method to fabricate high aspect ratio nanograting structures by direct DRIE process of silicon substrate using LIL pattern without intermediate layer was developed as a simple and cost-effective fabrication process. To fabricate high aspect ratio silicon nanograting with high pattern fidelity, a simulation method to predict the cross sectional profile of photoresist (PR) pattern after exposure and development processes was investigated, and the LIL processing conditions were selected to obtain optimized cross sectional profile of PR pattern without residual layer based on the simulation results. To minimize the side wall defects during the DRIE process due to the deterioration of LIL pattern etch barrier, the processing conditions of DRIE process including etching gas, etching gas ratio, passivation time and power were optimized. Finally, a silicon nanograting with a grating pitch of 780 nm and height of 2.42 µm (aspect ratio: 6) was fabricated via the developed direct DRIE process with LIL pattern.
We proposed a method to fabricate perpendicular magnetic nanotracks in the cobalt oxide/palladium multilayer films using UV-nanoimprinting lithography and low-energy hydrogen-ion irradiation. This is a method to magnetize UV-imprinted intaglio nanotracks via low-energy hydrogen ion irradiation, resulting the irradiated region are magnetically separated from the non-irradiated region. Multilayered magnetic nanotracks with a line width of 140 nm, which were fabricated by this parallel process without additional dry etching process, exhibited a saturation magnetization of 290 emu cm−3 and a coercivity of 2 kOe. This study demonstrates a cost-effective mass production of multilayered perpendicular magnetic nanotracks and offers the possibility to achieve high density storage and memory devices.
The increasing demand for lightweight, miniaturized electronic devices has prompted the development of small, high-performance optical components for light-emitting diode (LED) illumination. As such, the Fresnel lens is widely used in applications due to its compact configuration. However, the vertical groove angle between the optical axis and the groove inner facets in a conventional Fresnel lens creates an inherent Fresnel loss, which degrades optical performance. Modified Fresnel lenses (MFLs) have been proposed in which the groove angles along the optical paths are carefully controlled; however, in practice, the optical performance of MFLs is inferior to the theoretical performance due to fabrication errors, as conventional design methods do not account for fabrication errors as part of the design process. In this study, the Fresnel loss and the loss area due to microscopic fabrication errors in the MFL were theoretically derived to determine optical performance. Based on this analysis, a design method for the MFL accounting for the fabrication errors was proposed. MFLs were fabricated using an ultraviolet imprinting process and an injection molding process, two representative processes with differing fabrication errors. The MFL fabrication error associated with each process was examined analytically and experimentally to investigate our methodology.
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