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The objective of this study is to evaluate the effect of adding water at different concentrations (0.5%, 5% and 10%) in ethanol-95% gasoline and 85% (% V) of ethanol in addition to a white medium on the Corrosion Under Stress (CBT) for API 5L X52 steel, typically used in the transportation of hydrocarbons. The tests were performed at a constant rate of extension in a CERT machine at a nominal strain rate of 10-6 s-1. CERT test of simultaneous manner, using the technique of monitoring Electrochemical Noise potential noise and current noise wherein the fluctuations have correspondence with the dissolution of the material. Additionally, it is noted that evidence less in% (V) of the water present is less effective and secondary cracks in the samples analyzed for CBT test results cyclic polarization curves show no tendency to SCC.

Chemical Mechanical Planarization (CMP) is an integral step in fabrication processes of through silicon via based Interposer and Redistribution layer for routing. The key motivation in the CMP process is to achieve planarization with minimum recess and dishing on the metal routing sites. In this work we established the metrics for Within-wafer non-uniformity (WIWNU) and optimized the CMP parameters. Currently, there is no standard guideline for reporting the WIWNU during CMP and thus a better understanding and practice is needed to enhance post CMP uniformity across the wafer. The work reported in this article were conducted on 200 mm silicon wafers with either Copper or Tungsten to optimize the uniformity of removal rate with respect to polishing parameters, such as slurry flow, slurry composition, down force, relative velocity of wafer surface with pad, etc. With optimized CMP parameters for blank wafer, the WIWNU in patterned wafer were evaluated and analyzed for additional optimization in non-uniformity.

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The reliability of a redistribution layers in 3D IC is dependent on how well the different shape and size of metal connection with varying density are connected at the different metallization levels. The widely different coefficient of thermal expansion of metal (Cu ~16.5 × 10−6 m/mK) and dielectric (SiO2 ~ 3 × 10−6 m/mK) often leads to defects, such as cracking at the metal-dielectric interface. In this work, we present a manufacturing level friendly process modification to the conventional approach to present an almost crack free metal-dielectric interface for subsequent processing in the RDL fabrication. After the copper electroplating and chemical mechanical planarization (CMP), we use a cap layer to protect the top layer and anneal the metal. Finally, we repeat the CMP to remove the cap layer before sending the wafers for subsequent processing.