Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etching and electrochemical delamination methods with respect to residual submonolayer metallic contaminations. Regardless of the transfer method and associated cleaning scheme, time-of-flight secondary ion mass spectrometry and total reflection X-ray fluorescence measurements indicate that the graphene sheets are contaminated with residual metals (copper, iron) with a concentration exceeding 10(13) atoms/cm(2). These metal impurities appear to be partially mobile upon thermal treatment, as shown by depth profiling and reduction of the minority charge carrier diffusion length in the silicon substrate. As residual metallic impurities can significantly alter electronic and electrochemical properties of graphene and can severely impede the process of integration with silicon microelectronics, these results reveal that further progress in synthesis, handling, and cleaning of graphene is required to advance electronic and optoelectronic applications.

Good quality, complementary-metal-oxide-semiconductor (CMOS) technology compatible, 200 mm graphene was obtained on Ge(001)/Si(001) wafers in this work. Chemical vapor depositions were carried out at the deposition temperatures of 885 °C using CH as carbon source on epitaxial Ge(100) layers, which were grown on Si(100), prior to the graphene synthesis. Graphene layer with the 2D/G ratio ∼3 and low D mode (i.e., low concentration of defects) was measured over the entire 200 mm wafer by Raman spectroscopy. A typical full-width-at-half-maximum value of 39 cm was extracted for the 2D mode, further indicating that graphene of good structural quality was produced. The study also revealed that the lack of interfacial oxide correlates with superior properties of graphene. In order to evaluate electrical properties of graphene, its 2 × 2 cm pieces were transferred onto SiO/Si substrates from Ge/Si wafers. The extracted sheet resistance and mobility values of transferred graphene layers were ∼1500 ± 100 Ω/sq and μ ≈ 400 ± 20 cm/V s, respectively. The transferred graphene was free of metallic contaminations or mechanical damage. On the basis of results of DFT calculations, we attribute the high structural quality of graphene grown by CVD on Ge to hydrogen-induced reduction of nucleation probability, explain the appearance of graphene-induced facets on Ge(001) as a kinetic effect caused by surface step pinning at linear graphene nuclei, and clarify the orientation of graphene domains on Ge(001) as resulting from good lattice matching between Ge(001) and graphene nucleated on such nuclei.

Physical vapor deposition of Si onto transferred CVD graphene is investigated. At elevated temperatures Si nucleates preferably on wrinkles and multilayer graphene islands. In some cases, however, Si can be quasiselectively grown only on the monolayer graphene regions while the multilayer islands remain uncovered. Experimental insights and ab initio calculations show that variations in the removal efficiency of carbon residuals after the transfer process can be responsible for this behavior. Low-temperature Si seed layer results in improved wetting and enables homogeneous growth. This is an important step towards realization of electronic devices in which graphene is embedded between two Si layers.

We investigate a seed layer-free growth of HfO2 on commercially available chemical vapor deposited (CVD) graphene from various suppliers. It is revealed that the samples of monolayer graphene transferred from Cu to SiO2/Si substrates have different coverage with bi- and multi-layer graphene islands. We find that the distribution and number of such islands impact the nucleation and growth of HfO2 by CVD. In particular, we show that the edges and surface of densely distributed bi-layer graphene islands provide good nucleation sites for conformal CVD HfO2 layers. Dielectric constant of 16 is extracted from measurements on graphene-HfO2-TiN capacitors.

Plasma-enhanced chemical vapor deposition of thin a-Si:H layers on transferred large area graphene is investigated. Radio frequency (RF, 13.56 MHz) and very high frequency (VHF, 140 MHz) plasma processes are compared. Both methods provide conformal coating of graphene with Si layers as thin as 20 nm without any additional seed layer. The RF plasma process results in amorphization of the graphene layer. In contrast, the VHF process keeps the high crystalline quality of the graphene layer almost intact. Correlation analysis of Raman 2D and G band positions indicates that Si deposition induces reduction of the initial doping in graphene and an increase of compressive strain. Upon rapid thermal annealing the amorphous Si layer undergoes dehydrogenation and transformation into a polycrystalline film whereby a high crystalline quality of graphene is preserved.Ability to deposit uniform thin layers of insulators and semiconductors on graphene is of crucial importance for many envisioned applications of this material in advanced electronic and photonic devices.1 Si-graphene junctions are particularly interesting for graphene-based photodetectors, sensors, and high-frequency vertical heterojunction transistors.