Wide range tunable components are a key point for high frequency performances. We have developed a novel RF MEMS rotational capacitor based on surface variation and high displacement. This paper will present multiple designs with physical parameter variations for comparative test with fabricated device measurements. The goal of this work is to prove the proper operation of the devices according to fulfill target performances. The main parameters will be tunability, capacitance value, resonance frequency and finally maximal actuation voltage allowed.
The contribution will describe in detail recent development related to the integration of MEMS into a SiP design flow. A key step in implementing system-level simulation is the translation of the physical behavior of the constitutive components in a system from the more fine-grained continuum level to more abstract, coarse grained models. An important challenge is the preservation of accuracy from fine-grained simulation to a degree that is deemed adequate. In order for the simulator to run in a reasonable time, the system-level model should only include the degrees of freedom (DOF) necessary to capture the relevant physics. Very handy in this sense are methods of model-order reduction (MOR), which under certain conditions enable almost automatic transfer from the continuum level simulation up to the behavioral models with minimal loss of accuracy.The key part of the proposed MEMS enabled SiP design flow is the design platform MEMS+. This software provides a complete environment for designing state-of-the-art accelerometers, gyroscopes, microphones and many other types of MEMS. This latest developments of the MEMS+ suite extends the scope of the platform by providing a 'tunable' accuracy-versus-speed approach for co-designing MEMS and integrated circuits (ICs) and compatibility with more EDA analog/mixed-signal simulation environments. MEMS designers can automatically generate and export Reduced Order Models (ROMs) in Verilog-A format for use by IC designers. These exported models simulate 100X faster than fully non-linear MEMS+ models and are compatible with all commercial analog/mixed-signal circuit simulators that support the industry-standard Verilog-A hardware description language.The VerilogA models can be simulated in different EDA environments including the MEMS+ plug-in simulator, Matlab-Simulink, Cadence Spectre, Silvaco's SmartSPICE, and Agilent ADS.The transfer of the VerilogA into ADS for circuit simulation can be summarizes as following: We generated the VerilogA model of a MEMS Tunable Capacitor example using vertical displacement and made a DC sweep simulation, see figure 1 (in MEMS+ simulator plug-in) to obtain the capacitance function of the polarization and compared it with ADS circuit simulator, see figure 2. Comparing MEMS+ simulation and ADS (Verilog A) simulation, we obtain a good agreement, see figure3. The model can be now used for further and more advanced circuit simulation.In addition to simulation of the MEMS with its electronic environment, we describe how the MEMS design gets prepared for manufacturing and being verified based on 3D design rule checks.We describe the challenges and possibly solutions related to Design Rule Check (DRC) for MEMS devices, using an example of an RF MEMS Tunable Capacitor. Coventor developed two possibilities to check 3D design rules. One is based on MEMS+ parametric library elements. Another approach based on Coventor's SEMulator3D software platform for virtual fabrication. It utilizes a voxel (3D pixels) modeling engine to create step-by-step very real...
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