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In this paper, we present a new process flow to increase cell capacitance in planar dynamic random access memory cells designed for system-on-chip applications. Silicon dioxide of shallow trench isolation ͑STI͒ under capacitor electrodes is recessed to increase cell capacitance. It appears that the cell capacitance is increased to 25% when the STI recess is 0.15 m. The recession slightly decreases junction leakage current due to annealing of defects and also relief of STI stress. These combined effects increase refresh time about 50% in 1 Mb memory array. The distribution of breakdown voltage in capacitor oxide shows similar behavior compared with samples without STI recessed. Also, the lifetime of the capacitor oxide evaluated from the Weibull method exceeds 2000 years.There has been increasing interest of embedded dynamic random access memory ͑DRAM͒ for system-on-chip ͑SoC͒ application. 1-3 The advantages of embedding DRAM to logic circuits are increased bandwidth, reduced power consumption, and small die size. However, there are critical problems such as degraded refresh time in DRAM cells and low yield caused by increased processing steps when one embeds standard DRAM cells to logic processes. This is caused by incompatibility between DRAM and logic processes. While the DRAM process focuses on the reduction of cell size with sacrifice of device performance, the logic process mainly focuses on enhancing device performance by using processes such as dual-gate transistors, salicide, and multilevel metals. Unfortunately, these steps in the logic process degrade the refresh time of DRAM cells and also reduce total yield due to increased process steps. 4,5 Recently, planar DRAM cells are investigated to solve these problems. Planar DRAM cells consist of a pass transistor and a metal-oxide-semiconductor ͑MOS͒ capacitor. Although its cell size is normally 6-8 times larger than stack or trench type DRAM cells, it uses a standard logic process and thus enables use of a standard logic library and intellectual properties. 6 The weak point of planar DRAM cells compared with stack cells is a reduced cell capacitance because it uses only two dimensions. Although one can increase cell capacitance by increased cell area, packing density is reduced due to increased die size. The other way could be to use thinner gate oxide or high dielectric constant material such as silicon nitride or tantalum oxide. However, it becomes difficult to implement this in a logic compatible process.In this paper, we present a new process flow to increase cell capacitance in planar DRAM cells by partial recess of shallow trench isolation ͑STI͒. It appears that the cell capacitance is increased up to 25% when the recessed depth is 0.15 m. The measured reliability of the capacitor oxide has no difference compared with the sample without STI recession. These combinations enhance the refresh time of DRAM cells. Figure 1 shows a vertical structure of the DRAM cell used in this study. It has a p-MOS access transistor and a planar capacitor. The main char...

3This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License(http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.In shipbuilding and offshore plant construction, pipe-stools of various types are installed. Moreover, these are many quantities but they must be installed in a successive manner. Due to these characteristics the pipe-stool installation processes easily tends to cause the schedule delays in the overall production processes. In order to reduce delay, the goal of this study is to predicts production's lead time before manufacturing. Through this predictions it's expected to reduce total production's lead time by improving it's process. First of all, we made MLR(Multiple Linear Regression) and PLSR(Partial Least Square Regression) model to predict pipe-spool's lead time and then compared predictability of MLR and PLSR model. If a explanatory variable is added, it will be possible to predict results precisely.

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In the early 2010s, with rising oil prices and increasing purchase orders for offshore structures for deep-sea resource development, the shipyards that took these orders suffered unexpected losses. Unlike the construction of commercial carrier vessels, the construction of offshore structures necessary to develop deep-sea resources is difficult to manage due to the complexity of the outfitting process of the topside structure, which is a plant for gas and oil production and treatment. Piping components in particular, which comprise most of the design items, are difficult to manage because they involve 2 to 3 times the man-hours and up to 10 times the quantity of items compared to commercial carrier vessels. Due to not only high man-hours and quantity but also large fluctuations caused by design changes and long procurement lead times, process delays that result in delayed compensation frequently occurred. In response, Samsung Heavy Industries developed an integrated management system for piping components. This study describes the entering order optimization algorithm and work-volume assignment optimization algorithm, which are the core algorithms of this system. The entering order optimization algorithm determines the optimal installation order considering the procurement status of the piping components and the installation readiness status of the installation work site, through which it determines the entering order of the piping components. The algorithm seeks to accelerate the completion rate of installation of the piping components. Next, to minimize delivery delays of sub-contractors to the shipyard, this study developed a work-volume assignment optimization algorithm that can equalize the load on multiple sub-contractors considering the raw material readiness status and the production capacity of the sub-contractors, in terms of materials that must be ordered from external sub-contractors among the piping components whose entering order was determined. Finally, applying the algorithm developed using actual shipyard data resulted in an accelerated completion rate of installation and improved balance of load in terms of volume assigned to the sub-contractors.