In this paper we discuss the detection, investigation and remediation of a silicon pitting defect in gate oxide patterning processes. The pitting defect is detected by optical inspection after an oxide wet etch operation. The cause of the physical defect is discovered as the result of Non-Visual Defect (NVD) inspection at process steps prior to the wet etch. A particular type of NVD, electric charge on a photoresist film, is detected at a process step immediately prior to the wet etch. A positive charge exceeding a specific level is highly correlated with the pitting defect, which only occurred on silicon that is doped to create an excess of free holes (p-type silicon). The manufacturing process is modified to reduce the level of process-induced charge, which also reduces the occurrence of pitting defects. A similar pitting defect is subsequently detected on a second manufacturing line at a different technology node. In this case, our investigation reveals that high negative charge on photoresist resulted in pitting only on silicon that is doped to create an excess of electrons (n-type silicon). Finite element modeling is used to identify a possible explanation for the charge-induced pitting defect.

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