No abstract

In this paper, we describe technologies to produce fine-pitch Cu wiring that provides high reliability and connects between chips for 2.1D/2.5D packaging. We have developed a semi-additive process to fabricate L/S = 1/1 μm wiring on an organic dielectric layer. The wiring uses Metal Cap barrier applied to LSI technology in order to suppress Cu diffusion and corrosion. This cap barrier oxidizes to form a passivation layer which prevents corrosion of the Cu wiring. The reliability of this wiring has been verified under HAST (Highly Accelerated temperature and humidity Stress Test) conditions, with a CoWP barrier in particular realizing higher reliability.