Copper (Cu)/low-k interconnects were fabricated using novel Cu diffusion-barrier SiC films deposited with a novel precursor, 1,1-divinylsilacyclopentane (DVScP). At 46% overetching time, the yield of the via-contact with the dielectric barrier of conventional SiC films was seriously reduced, while that of the novel SiC films was hardly reduced. By using the novel SiC films, the thickness of diffusion barriers was successfully reduced to 15 nm, matching the 32 nm node and beyond. By using the novel SiC films, the dielectric constant of the barrier films was decreased and their thickness was reduced with no yield reduction of the via-contact. As a result, the product of wiring resistance and capacitance (RC product) was reduced by 11.4%. The time-dependent dielectric breakdown (TDDB) lifetime of Cu interconnects with the SiC films was similar to that with the SiCO films. #

A new polycrystalline silicon (poly-Si) lateral double-diffusion metal oxide semiconductor field-effect transistor power device combining super-lateral-growth technology and shielding-trench oxide structures (STO-LDMOSFET) is introduced. The trench oxide offers a platform for amorphous silicon lateral growth through excimer laser annealing; this not only enables stable control of the crystallization of poly-Si but also promotes the blocking ability of devices. The breakdown voltages of the manufactured devices with and without trench oxide are 460 and 387 V, respectively, increasing by approximately 73 V. The characteristics of poly-Si treated with an excimer laser were obtained by low-temperature poly-Si LDMOSFET (LTPS-LDMOSFET) measurement and simulation. Then, STO-LDMOSFETs were studied by simulation. The results showed that the STO-LDMOSFET with a 150 cm2 V-1 s-1 mobility had a breakdown voltage and a specific on-resistance of approximately 450 V and 16 Ω cm2, respectively, at a 40 µm drift region length.