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Dynamic Range determines the ability to see detail in scenes with varying illumination intensities, whether the viewing element is an eye, conventional film, or a digital image sensor. There are two distinct measures of dynamic range: interscene and intrascene. The first is the absolute range viewable, where the viewing mechanism has time to adapt to the full range of sensitivity to incident illumination and the second is the range achievable in just a single setting and time. Digital image sensors are not renowned for their intrascene dynamic range capabilities and simply pointing a video camera at a scene that includes both indoor and outdoor ambient lighting levels will usually render the indoor or outdoor part of the scene useless. There are numerous situations where a wide intrascene range needs to be imaged. CMOS imaging solutions are dominated by linear response sensors, as these devices offer the best signal to noise ratio. However, their dynamic range is usually limited. By contrast, logarithmic sensors compress the received signal to allow a greater range of illumination intensities to be captured. The compression unfortunately makes the noise more prominent. The research reported in this Thesis investigates how to combine linear and logarithmic modes of circuit operation to improve CMOS imager intrascene dynamic range. A single chip, 360x288 pixel image sensor has been designed, fabricated and characterized to demonstrate the ideas developed during the research. The pixel circuits are switchable between linear and logarithmic modes: after the set exposure period the linear result is readout then the logarithmic mode is switched in and read-out. Single or two parameter calibration can be performed to reduce the relatively high level of FPN (Fixed Pattern Noise) in the raw logarithmic data. The settling time of the logarithmic mode of operation is identified as an important constraint on this approach and is optimized by the inclusion of an amplifier. To permit a pixel pitch of 5.6zm in a 0.1 8m technology and achieve a 33% fill-factor, circuit and layout architectures have been devised to place the majority of the amplifier in the column in a way that allows it to be switchable between rows. The combining of linear and logarithmic data in a single image provides an intrascene dynamic range in excess of 120dB. The sensor can operate at 26 frames per second when employing single parameter calibration of the logarithmic mode. Comprehensive characterization of both modes and the overall performance of the sensor is also outlined. Critical discussion and suggestions on further research conclude the Thesis. There are many people who I would like to thank for their support over the last three and a half years. Firstly, I would like to thank my supervisor, Dr David Renshaw, for initially suggesting the Ph.D to me and then his attentive supervision throughout the project. Another person who has been a great support throughout the project is Keith Findlater, my unofficial industrial supervisor. Many thanks go to ...

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CMOS imagers are well known to offer advantages of low-power, low-voltage, and increased integration over the competing charge coupled device (CCD) technology. These benefits enable cost-effective solutions to applications such as mobile imaging [1]. However, for high quality applications, the dark current and the temporal noise floor in CMOS image sensors must be improved. The pinned photodiode pixel [2], commonly used in CCDs, can bring these performance improvements to CMOS imagers while retaining the advantages of increased circuit integration.To bring the full benefit of the pinned photodiode pixel type elimination of kTC noise, the readout noise floor must be minimized. Column parallel analog-to-digital converters (ADCs) allow low bandwidth readout amplifiers to be used. This is a key advantage of the column-parallel ADC approach over the use of a wide bandwidth single output amplifier such is in CCDs or single ADC CMOS imagers [3]. Figure 12.4.1 shows the architecture of the column-parallel readout ADC imager. The column is composed of a sample and hold stage, comparator, and 11b ADC memory. Single-slope ADC conversion is performed by a voltage ramp to the comparator inputs as a counter drives the random access memory (RAM). The counter value is stored when the individual column comparator switches [1]. A ramp generator provides 2 ramps simultaneously to allow analog white noise balance and which also minimizes quantization noise in the blue channel where the signal is lower. The sensor uses a Bayer pattern color filter array (CFA). To avoid column mismatch in the green channel which causes a fixed pattern noise, the green ramp and pixel data are always converted by odd columns; a multiplexor ensures that the correct pixel color is connected to the appropriate column for each line. While a mismatch is still present between the green channel and the other two colors, this is automatically corrected by automatic white balance during color image reconstruction.One of the perceived drawbacks of the column parallel ADC approach is the area overhead. To save die size, a 3-transistor dynamic RAM (DRAM) (Fig. 12.4.2) is used for the column ADC memory rather than static RAM. The DRAM requires no additional process steps and occupies only 120µm for two banks of 11b per column. Because of the progressive scan operation of the sensor, the RAM is only required to hold for 1 line time, therefore retention time is much less of a problem than in normal DRAM circuits. The read and write power at 48MHz of the DRAM is <2 mW. This readout rate permits 30frames/s operation at SXGA resolution (1280x1024). The sensor also supports sub-sampled and window-of-interest VGA modes.The readout noise is composed of the following: thermal and 1/f noise of the pixel source follower, kT/C noise of the sample-andhold for the ADC, the thermal noise of the ADC comparator, noise on voltage references and supplies and the quantization noise of the ADC. At low light levels, where the analog gain of the ADC is high (i.e. the ramp step size is sma...

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