A new rapid thermal annealing (RTA) method that uses GaAs guard rings has been developed. A new temperature monitoring method is also described. Generations of slip lines on 2-in.-diam GaAs wafers annealed in different kinds ofRTA arrangements were investigated by x-ray transmission topography. The use of three GaAs guard rings has been found to be very effective in reducing slip lines. The temperature dependence of activation and uniformity of annealing characteristics for a selective Si-implanted 2-in.-diam GaAs wafer at 100 ke V with a dose of 5 X 10 12 em -2 were evaluated by drain saturation current (Idss) distribution of gateless field-effect transistors (FETs) over the wafer. The best uniformity, as well as the highest activation, was obtained by RTA at 920°C for 15 s, The activation energy of 1.47 eV for the average value of Idss ( Idss) was obtained. By using this RTA method, GaAs digital integrated circuits (ICs), dual-modulus prescalers, have been successfully fabricated with high yield for the first time. This RTA method is very promising for GaAs digital IC processing.

We have developed novel selective thermal oxidation process for AlGaN/GaN Heterostructure Field Effect Transistors (HFETs) and realized extremely high device isolation and high drain breakdown voltage device of over 1OOV The leakage current of device isolation between two active islands exhibited drastic reduction of 5 order of magnitude smaller than that of conventional mesa isolation process. Moreover, the fabricated 1.3um-gatelength AlGaN/GaN HFETs exhibited maximum transconductance ( g m d of 130mS/mm, maximum drain current (I,-) of SOOmA/mm and excellent pinch off characteristics at high drain voltage of over 120V.heterostructure is that the density of 2DEG is extremely high, more than 1 X lOI3 by the piezoelectric effect and spontaneous polarization effects(3). One-order magnitude higher output power can be expected by simply changing the material.

A fabrication process of 0.5 Gm gate GaAs-MESFETs combined with high-dielectric-constant thin-film capacitors was investigated. A buried p layer (BP) is employed to suppress short-channel effects by using the carbon ion implantation technique. These BP-MESFETs have a self-aligned n+ asymmetric lightly doped drain (LDD) structure to realize low source resistance and high drain breakdown voltage. The planarization technique was adopted to deposit an Au overlayer on top of the 0.5 pm WSi gate to improve the high-frequency performance by reducing the gate resistance. These BP-MESFETs have a high K value, over 230 mA V-2 mm-'. and a maximum freauencv of oscillation fmnr of 60 GHz with an n+ asymmetric structure.We also have developed high-dielectric-constant SrliOa thin-film capacitors by using the low-temperature RF sputtering method. These SrTiOa films have high e,, over 100, and low leakage current density, under 1 x at 1 MV cm-'. By using this SrTiOs capacitor for the bypass capacitors of the MMIC, we can reduce the pin counts of the MMIC and will be able to realbe a shrinkage of the total size of the RF unit of a cellular telephone. We have fabricated the front-end IC of a cellular telephone using this newly developed process technology, and can achieve low power consumption. A transistor) have been developed for these applications.Recently, i n order to improve the poor uniformity, reproducibility, and manufacturability of the conventional 0268-1242/95/111534+07519.50 0 1995 IOP Publishing Ltd GaAs MESFET with a recessed gate structure, selfaligned GaAs MESFETs with a refractoIy metal gate such as WSi, WSN, or WN have been developed for the GaAs ICs (integrated circuits). The development of the self-aligned MESFET (SAFET) process was primarily stimulated for GaAs digital circuits. Therefore, most of the self-aligned GaAs MESFETs with refractory metal gates already reported had a symmetric lightly doped drain (LDD) structure [4]. I n our recent work, self-aligned GaAs MESFETs were applied for analoguefront-end ICs of cellular telephones using the nt asymmetric LDD structure. By adoping this nt asymmetric LDD structure, we can realize high drain breakdown voltage and low source

A highly miniaturized and low power consumption receiver front-end hybrid IC(H1C) including input matching circuits for 880MHz bands using on-chip high-dielectric constant (E,) capacitors has been newly developed. The HIC is composed of a GaAs IC chip and a ceramic substrate with spiral inductors on its surface. The HIC showed conversion gain of 20.2dB and noise figure of 4.2dB at supply voltage of 2.7V and dissipation current of 3.7mA. The HIC measures only 5.0mmx5.0mmxl.Omm.

A l o w current dissipation MMIC power amplifier operating with a 3.5V single voltage supply has been developed f o r PHS. This MMIC utilizes a pseudomorphic double he teroj m c t i on mo dul at ion doped FET (P-MODFET) to realize single voltage operation andlow operating culrent simultaneously. It exhibits very l o w operating current o f 141mA at the output power o f 21.5dBm with l o w adjacent channel leakage power o f -5 6 . l d B c in the single voltage supply condition. This operating current i s one o f the lowest values that have been reported o n the single voltage operation MMIC power amplifiers for PHS.