Using n+/p junctions formed by solid phase diffusion, a clear correlation between junction leakage and NiSi thermal instability was readily established. After forming an NiSi layer on damage-free junctions, various post-annealing processes at around the silicidation temperature were applied. A consistent and systematic rise of the leakage level was observed with the increase of the annealing time and the temperature. The migration of the released Ni atoms away from the NiSi layer, the subsequent clustering of the migrant Ni atoms, and the eventual formation of generation-recombination centers deep inside the Si substrate were identified as the basic components of the principal leakage mechanism. Detailed analysis of the thermally stimulated ingressive movement of the leakage-depth profiles revealed a substantial Ni burst at an early stage of annealing. This anomalous Ni burst imposes severe restrictions on junction shallowing for NiSi technology and sets a strict upper limit on the allowable process temperature for effective leakage suppression.

The spatial resolution of scanning spreading resistance microscopy has been limited by using conventional probes when measuring in air. Sufficient electric contact of a probe-sample has been difficult to obtain in air due to the existence of moisture/contamination. Two-dimensional carrier profiling of nanoscale silicon devices is performed in a vacuum with conventional probes, and a high spatial resolution is obtained. Ultrashallow junctions down to 10nm are measured accurately with high reproducibility. Experimental results show that a good electric contact between probe and sample is important for obtaining high spatial resolution.

In this paper, we present a cost-effective 28nm CMOS technology for low power (LP) applications based on a high-k, single-metal-gate-first architecture. We report raw gate densities up to 4200 kGate/mm 2 , and, using the ARM Cortex-R4F as a reference, we report achievement of an overall 2.4x area reduction in 28nm from 45nm technology. Our high-density SRAM bit-cell (area= 0.120mm 2 ) has a demonstrated Static Noise Margin (SNM) of 213mV at 1V. Fully compatible with power/leakage management techniques intensively used in low power designs, the transistor drive currents are increased +35% & +10%, for nFET and pFET respectively, with respect to a 28nm LP poly/SiON reference [3]. Compatible with LP system-on-chip requirements, ultra low-cost, high performance analog devices are reported which leverage a dramatic improvement in matching factor (AVT~2mV.um) versus our previously-reported result [2]. An optimized interconnection scheme based on Extreme Low k (ELK) dielectric (k~2.4) and advanced metallization allows high density wiring with competitive R-C versus our previous technology.

The strawberry leaf beetle, Galerucella vittaticollis Baly, is an oligophagous insect that feeds on strawberry and polygonaceous plants. (Gramineae). The main component of the headspace of all host plants tested was one of the green leaf volatiles, cis-3-hexenyl acetate. This compound was detected also in the non-host plants except T. aestivum. However, its relative content in A. princeps or L. chinense was different from that in host plants. The headspace of R. sativus contained one of the isothiocyanates, characteristic components of brassicaceous plants, in addition to cis-3-hexenyl acetate. The attractancy of cis-3-hexenyl acetate and two other typical green leaf volatiles, cis-3-hexen-1-ol and trans-2-hexenal, to the beetles was examined. The beetles were significantly attracted to only cis-3-hexenyl acetate. The findings suggest that G. vittaticollis uses cis-3-hexenyl acetate as an olfactory cue to find the host plants, strawberry and polygonaceous plants.

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