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a b s t r a c tThis work presents the design, fabrication, and characterization of a hydrogen sensor based on a palladium/nanowire Schottky barrier field-effect transistor that operates at room temperature. The fabricated sensor consists of boron-doped silicon nanowire arrays that are contact printed on top of a SiO 2 /Si substrate with subsequently evaporated Pd contacts. The fabrication process is compatible with post-CMOS and plastic substrate integration as it can be completed at temperatures below 150• C with good yield and repeatability. The sensor can reliably and reversibly detect H 2 concentrations in the range from 3 ppm to 5% and has a sensitivity of 6.9%/ppm at 1000 ppm. A response distinguishable from drift and noise is produced in less than 5 s for H 2 concentrations over 1000 ppm and less than 30 s for concentrations over 100 ppm. The sensor settles to 90% of the final signal value in about 1 h at lower concentrations and less than 1 min at 10,000 ppm H 2 . Drift over an 87-h measurement period is below 5 ppm H 2 concentration.

Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8" wafers. Large I ON at low V DD are possible according to TCAD simulations but awaits verification. V DD scaling will greatly benefit from low (effective) band gap energy, which may be provided by type II heterojunctions of Si/Ge or compound semiconductors.A Looming Barrier to IC Scaling Reducing the voltage V DD is a powerful way to reduce IC energy consumption, which is proportional to V DD 2 . Power usage was kept under control when V DD was reduced in proportion to half-pitch up to 130nm as shown in Fig 1 [1]. The 14nm node is projected to operate at 0.7V, making the power consumption 25x larger than it would be if operated at 0.14V as the past trend suggests. While IC power consumption has been much discussed as a thermal management challenge, it is also responsible for a few percent of the electricity usage and growing fast. MOSFET current cannot rise faster than one decade for every 60mV increase in V g (the subthreshold swing, SS). To reduce V DD to 0.14V with I ON /I OFF ratio of mere 3 decades, SS needs to be 45mV/decade. A low voltage transistor (Green Transistor, gFET) is needed.Green Transistor with Steep Turn On/Off In MOSFETs (and BJTs), a potential barrier is raised and lowered by V g to turn the current on and off (Fig. 2). Due to Boltzmann distribution, some electrons always have sufficient energy to pass over the barrier. The current can only be reduced by the rate of electron density drop with increasing energy, hence the 60 mV/decade limit [1]. To beat this limit, the carriers must not flow over a barrier. They may tunnel through it. Fig. 3 shows a prototype tunnel transistor [1][2][3][4]. Electrons are generated by band-to-band tunneling in the P+ source when the gate voltage bends the energy band to satisfy two conditions-overlap of the valence and conduction bands and the a high electric field or thin tunnel barrier [5]. The generated electrons flow through the surface N-channel to the drain. Fig. 4 shows simulated I d -V g [6] assuming uniform source doping. In all > 3E19 cm -3 cases, steep turn on occurs at the onset of band overlap. Unfortunately the graded source doping profile and the averaging effect of the Poisson equation provide a continuous range of (effective) doping concentration near the tip of the source. At points of lower doping (Fig. 4) the turn-on voltages and electric field (therefore I ON ) are both lower. The envelope of these curves is the IV of a prototype tunnel transistor, with a disappointing sub-V t swing.

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