The advent of new 90nm/130nm VLSI technology and SoC design methodologies, has brought an explosive growth in the complexity of modern electronic circuits. As a result, functional verification has become the major bottleneck in any design flow. New methods are required that allow for easier, quicker and more reusable verification. In this paper we propose an automatic verification methodology approach that enables fast, transaction-level, coverage-driven, self-checking and random-constraint functional verification. Our approach uses the SystemC Verification Library (SCV), to synthesize a tool capable of automatically generating testbench templates. A case study from a real MP3 design is used to show the effectiveness of our approach.

The advent of the new VLSI technology and SoC design methodologies has brought about an explosive growth to the complexity of modern electronic circuits. As a result, functional verification has become a major bottleneck in any digital design flow. Functional verification has two major problems: choose good stimuli and measure coverage. This paper present a movie generator called RandMovie used together with a coverage library in order to implement a generator capable of producing a synthetic random constrained movie. With such a movie generator one is capable of generating good random constrained movies, increasing coverage and simulating all specified functionalities. A case study for an MPEG-4 decoder design has been used to demonstrate the effectiveness of this approach.

During functional verification, complex interactions between multiple modules that compose a digital circuit design can reveal hard-tofind bugs. Functional coverage specifications must be precise to assure these interactions occur during the simulation. We are proposing a technique for improving the functional verification specification of individual modules, preserving the occurrence of these interactions scenarios in the composition phase. We obtain these new specifications in a deductive way, by means of set theory. Using experimental results, we show how our work can contribute to error detection and save functional verification time.

The advent of the new VLSI technology and SoC design methodologies has brought about an explosive growth to the complexity of modern electronic circuits. One big problem in the hardware design verification is to find good stimuli to make functional verification. A MPEG-4 decoder design require movies in order to make the functional verification. A real movie applied alone is not enough to test all functionalities, a random movie is used as stimuli to implement functional verification and reach coverage. This paper presents a comparison between a random constrained movie generator called RandMovie versus the use of a Unconstrained Random Movie. It shows the benefits of using a random constrained movie in order to reach the specified functional coverage. With such a movie generator one is capable of generating good random constrained movies, increasing coverage and simulating all specified functionalities. A case study for an MPEG-4 decoder design has been used to demonstrate the effectiveness of this approach.