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The advent of new 65 nm/90 nm VLSI technology and SoC design methodologies has brought an explosive growth in the complexity of modern electronic circuits. As a result, functional verification has become the major bottleneck in any digital design flow. Thus, new methods for easier, faster and more reusable verification are required. This paper proposes a verification methodology (VeriSC2) that guides the implementation of working testbenches during hierarchical decomposition and refinement of the design, even before the RTL implementation starts. This approach uses the SystemC Verification Library (SCV), in a tool capable of automatically generating testbench templates. A case study from a MPEG-4 decoder design is used to show the effectiveness of this approach.

This paper presents a surface plasmon resonance system based on a polymer prism chip. The device allows operation in both the angular and wavelength interrogation modes. The biochip design is discussed emphasizing the effect of the ambient temperature over the optical behavior. Birefringence effect, biochip polishing, and responsivity are also reported. The basic mathematical formulation for both operating modes is discussed, and morphological parameters are considered in the data analysis. Experimental sensorgrams obtained at both interrogation modes with the same polymer prism chip are presented and compared. The experimental sensorgrams obtained with assays providing reversible (phosphate buffered saline and hypochlorite solutions) and irreversible (neutravindin solution) bindings demonstrate the feasibility of the proposed design.

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