In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPS K, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL. Keywords-transmission errors; WiMAX (Worldwide interoperability for microwave access); WiFi (Wireless Fidelity); FPGA; deinterleaver, (BER) Bit-Error-Rate I.978-1-4799-4190-2/14/$31.00 ©2014 IEEE

In this paper a new high speed address generator for the dynamic modulation scheme supportive WiMAX deinterleaver design is proposed. The WiMAX can be both fixed and mobile, in this work the mobile WiMAX is given more importance. The mobile WiMAX uses interleaving and deinterleaving techniques in its transreceiver for eliminating the transmission errors. The WiMAX supports QPSK, 16-QAM and 64-QAM modulation schemes for establishing a connection between subscriber and base stations. Deinterleaver has to produce the addresses for these different modulation schemes by performing the inverse operation of interleaving. The address generator in the deinterleaver hinders the performance of the receiver section of the WiMAX system so it has to be optimized to improve the overall performance. In this paper a new ASIC based design has been proposed for the address generator and the design is been modelled in VHDL. Keywords-WiMAX (Worldwide interoperatability for microwave access); FEC (Forward error correction); ASIC; deinterleaving; VHDLI.

In this paper, we analyzed the feasibility of using a virtual carrier based carrier frequency offset estimation algorithm in the presence of I/Q imbalance in OFDM systems. Based on the analysis of the signal model with both receiver CFO and I/Q imbalance impairment we conclude that it is feasible to extending the virtual carrier based CFO estimation algorithm to the I/Q imbalance scenario. The CFO estimation performance is evaluated through computer simulation. Impact of parameters on the estimation performance is investigated and it is consistent with our analysis. After CFO correction, a blind based I/Q imbalance estimation and compensation algorithm is applied. The final detection performance demonstrates that the virtual carrier based CFO estimation performance is good enough for subsequent I/Q imbalance estimation and compensation.