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We report a design and implementation of lateral silicon photodetectors fabricated on a silicon-on-insulator (SOI) substrate in a complementary CMOS-compatible process. In addition, we disscuss the structure dependences on the frequency and optimum design for a maximum bandwidth. A standard device fabricated with a 210 nm absorbing layer, a finger width of 1.00 µm, a finger spacing of 1.63 µm, a square detector area of 20 × 20 µm2, and a pad size of 60 × 60 µm2 achieved a bandwidth of 12.6 GHz at a bias voltage of 10 V, with a responsivity of 7.5 mA/W at 850 nm wavelength. A photodetector with the same geometry, which was fabricated with a smaller pad size of 30 × 30 µm2, exhibited a bandwidth of 13.6 GHz.

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We fabricated metal–semiconductor–metal (MSM) photodetectors on the metamorphic InAlAs layer grown on a GaAs substrate. The devices were measured at a wavelength in the 0.8 µm regime. The receiving area is 30 × 30 µm2 and the electrode spacings are 2, 1, and 0.4 µm. At the electrode spacing of 1 µm, a dark current of 125 nA was obtained at a bias voltage of −15 V. At a wavelength of 830 nm, a responsivity of 0.13 A/W was obtained at a bias voltage of −15 V. At a wavelength of 850 nm, the maximum bandwidth of 9 GHz was obtained at a bias voltage of −15 V.