The influence of fluorine upon the annealing behavior at 450–500 °C of BF2+ implanted layers on silicon wafers was investigated by measurement of the sheet resistance, the carrier profile, and the crystallinity. The junction leakage current was also measured. Approximately one order of magnitude retardation in the average regrowth rate and lower electrical activation of implanted boron were observed in BF2+ implanted layers as compared with B+ implanted preamorphized layers. However, a leakage current level as low as 1.97×10−9 A/cm2 was measured, which is about three orders of magnitude less than reported in the literature. This result was obtained in the BF2+ implanted silicon p+n junction at an annealing temperature as low as 500 °C by employing ultraclean ion implantation techniques.

The characteristics of an ion implantation-induced defect in a silicon substrate are investigated. This defect is considered to be a complex of a point defect and a substrate dopant atom. The experiments are conducted by focusing on the dependence of the substrate dopant species (phosphorus and boron) on defect formation. The characteristics of the defect are investigated by measuring the bulk generation lifetime (τg) of metal–oxide–semiconductor capacitors, in which Si+ has been implanted to form the dopant-related defects in the substrate (damaging implantation) after gate oxide formation. As a result, it is found that the τg of the boron-doped substrate is one to two orders of magnitude smaller than that of the phosphorus-doped substrate for the same Nsub under the same implantation conditions. The temperature dependence of τg shows that the energy level of the defect is located at the intrinsic Fermi level, independent of the substrate dopant species and the concentration. By measuring the dependence of τg on the temperature of postdamaging implantation annealing, it is shown that the defects vanish at about 800 °C for both types of substrate. Also, it is found that the amount of dopant-related defects depends on the implantation ion species. BF2+ implantation forms more defects than As+ implantation.

Selective lateral etching of the SiGe layer for various Si/SiGe/Si systems was studied. We showed the different etching rates for SiGe layers with the same thickness and Ge concentration, but with different structures of the Si/SiGe/Si stacked layer. We described a mechanism that could explain the experimental results of selective etching of SiGe layers in Si/SiGe/Si systems. According to the mechanism, we were able to summarize the following 3 key points in realizing high selectivity SiGe etching.  1) Should be the SiGe layer in a higher oxidation state (enough number of holes), 2) a wider area is necessary for Si substrate surface in contact with the solution, and 3) the current path should be maintained at the SiGe/Si interface.

Local SOI MOSFETs were fabricated in the designed area on a Si bulk substrate using the separation by bonding silicon islands (SBSI) method. We describe the key fabrication process technology and show the electrical characteristics. The SBSI method consists of three key technologies: epitaxial growth of SiGe having high germanium concentration, lateral selective etching of SiGe, and bonding of buried oxides (BOX) grown in the gap. Epitaxial growth of 30 nm-thick Si 0.63 Ge 0.37 without crystalline defects was achieved by reducing the growth temperature to as low as 450 ºC. The Si/Si 0.63 Ge 0.37 structure allowed lateral etching of Si 0.63 Ge 0.37 with a length of 1 µm in 2 minutes and with negligible etching of Si in a solution of hydrofluoric acid and nitric acid. Fabricated MOSFETs showed excellent characteristics, which were comparable to those of SOI wafers, although a small gap still remained in the BOX.

p+n junctions are fabricated by the combination of BF3 plasma immersion ion implantation (PIII) and low-temperature post-implantation annealing. Ultrashallow junctions and very low leakage currents (∼10-11 A at -1 V in 1 mm2 junctions) have been obtained. Despite the fact that the activation of the PIII layer is not sufficient, the I–V characteristics obtained are comparable to those of junctions formed by conventional ion implantation. By a combination of Si+ preamorphization and BF3 PIII aimed to improve the dopant activation, a maximum surface concentration of activated boron higher than 1020 cm-3 is obtained in 550°C annealing for p+n junctions with 5 nm depth. The leakage currents, however, are increased by the Si+ implantation in low-temperature post-implantation annealing.