Fabrication of SOI MOSFET by Separation by Bonding Silicon Islands (SBSI) Method

Abstract

Local SOI MOSFETs were fabricated in the designed area on a Si bulk substrate using the separation by bonding silicon islands (SBSI) method. We describe the key fabrication process technology and show the electrical characteristics. The SBSI method consists of three key technologies: epitaxial growth of SiGe having high germanium concentration, lateral selective etching of SiGe, and bonding of buried oxides (BOX) grown in the gap. Epitaxial growth of 30 nm-thick Si 0.63 Ge 0.37 without crystalline defects was achieved by reducing the growth temperature to as low as 450 ºC. The Si/Si 0.63 Ge 0.37 structure allowed lateral etching of Si 0.63 Ge 0.37 with a length of 1 µm in 2 minutes and with negligible etching of Si in a solution of hydrofluoric acid and nitric acid. Fabricated MOSFETs showed excellent characteristics, which were comparable to those of SOI wafers, although a small gap still remained in the BOX.

Mechanism of Selective Etching of SiGe Layers in SiGe/Si Systems

“…Various SiGe/Si systems were fabricated using separation by bonding Si islands (SBSI) technology (1,4) in this study. The different cross sectional structures of the various SiGe/Si systems are schematically illustrated in figure 1.…”

“…Highly selective etching of SiGe layers is required for various SiGe/Si systems (1)(2)(3)(4) in the LSI manufacturing process. When we design a micro-fabrication etching process, we must know not only the etch rate of materials to be etched, but also the device structure dependence of the etch rate.…”

High current fast switching n-ZnO/p-Si diode

“…A nonvolatile memory in Si-based circuits consists of a memory element and a switching element. Memory elements make any bistable electronic states in dielectric or resistive variation, while switching elements are active switches as a form of transistor or diode in general [1][2][3]. Although Si-based transistor switches have worked with the recently developed memory elements such as resistive random access memory (ReRAM) [4] and phase-change random access memory (PRAM) [5], they meet the difficulties in the fabrication of high density and three-dimensional (3D) stack structures for the nonvolatile memory array.…”

“…Although Si-based transistor switches have worked with the recently developed memory elements such as resistive random access memory (ReRAM) [4] and phase-change random access memory (PRAM) [5], they meet the difficulties in the fabrication of high density and three-dimensional (3D) stack structures for the nonvolatile memory array. Those fabrication difficulties contain high processing temperature and high-quality silicon layers [3]. Si-based p-n diodes also come up with the same problem as Si-based transistors meet.…”