and data-center networks 3, 6, 7

Optical phased arrays (OPAs) implemented in integrated photonic circuits could enable a variety of 3D sensing, imaging, illumination, and ranging applications, and their convergence in new lidar technology. However, current integrated OPA approaches do not scale—in control complexity, power consumption, or optical efficiency—to the large aperture sizes needed to support medium- to long-range lidar. We present the serpentine OPA (SOPA), a new OPA concept that addresses these fundamental challenges and enables architectures that scale up to large apertures. The SOPA is based on a serially interconnected array of low-loss grating waveguides and supports fully passive, 2D wavelength-controlled beam steering. A fundamentally space-efficient design that folds the feed network into the aperture also enables scalable tiling of SOPAs into large apertures with a high fill-factor. We experimentally demonstrate, to the best of our knowledge, the first SOPA using a 1450–1650 nm wavelength sweep to produce 16,500 addressable spots in a 27 × 610 array. We also demonstrate, for the first time, far-field interference of beams from two separate OPAs on a single silicon photonic chip, as an initial step towards long-range computational imaging lidar based on novel active aperture synthesis schemes.

A 4-channel time-wavelength optical pulse interleaver is implemented on a silicon chip. The interleaver forms a train of pulses with periodically changing wavelengths by demultiplexing the input pulse train into several wavelength components, delaying these components with respect to each other, and multiplexing them back into a single path. The interleaver is integrated on a silicon chip, with two arrays of microring resonator filters performing multiplexing and demultiplexing, and long sections of silicon waveguides acting as delay lines. The 4-channel interleaver is designed for an input pulse train with 1 GHz repetition rate, and is measured to have 0.35% RMS pulse timing error, insertion loss between 1.6 dB and 5.8 dB in different channels, crosstalk below -24 dB, and 52 nm free spectral range achieved using the Vernier effect.

We demonstrate ring and racetrack resonators with Q s of 3.8 to 7.5 million and 100 MHz bandwidth racetrack resonator filters, implemented in a thick silicon-on-insulator foundry platform that features a 3 µm thick device layer. We show that special racetrack resonators (with weakly guiding straight sections that transition to strongly confining bends) implemented in this platform can be preferable to rings for applications such as integrated microwave–photonic signal processing that require filters with sub-GHz bandwidth, tens of GHz of free spectral range (FSR), and a compact footprint for dense system-on-chip integration. We demonstrate ring resonators with 7.5 × 10 6 intrinsic Q , but limited FSR of 5.1 GHz and a taxing footprint of 21 m m 2 due to a large 2.6 mm bend-loss-limited radius. In comparison, we demonstrate two racetrack resonator designs with intrinsic Q s of 3.8 × 10 6 and 4.3 × 10 6 , larger respective FSRs of 11.6 GHz and 7.9 GHz, and less than 1 / 20 t h the area of the ring resonator. Using racetrack resonators, we implemented a four-channel, 100 MHz wide passband filter bank with 4.2 to 5.4 dB insertion loss to drop ports.

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