Silicon photonic time-wavelength pulse interleaver for photonic analog-to-digital converters

Abstract

A 4-channel time-wavelength optical pulse interleaver is implemented on a silicon chip. The interleaver forms a train of pulses with periodically changing wavelengths by demultiplexing the input pulse train into several wavelength components, delaying these components with respect to each other, and multiplexing them back into a single path. The interleaver is integrated on a silicon chip, with two arrays of microring resonator filters performing multiplexing and demultiplexing, and long sections of silicon waveguides acting as delay lines. The 4-channel interleaver is designed for an input pulse train with 1 GHz repetition rate, and is measured to have 0.35% RMS pulse timing error, insertion loss between 1.6 dB and 5.8 dB in different channels, crosstalk below -24 dB, and 52 nm free spectral range achieved using the Vernier effect.

III–V/Silicon Hybrid Non-linear Nanophotonics in the Context of On-Chip Optical Signal Processing and Analog Computing

“…The manufacturing capabilities of the CMOS foundries used for silicon photonics enable complex integrated photonic architectures, which have been used for optical signal processing [55,56,62,63], optical computing [4,5], and quantum optics where integration enables high precision and controllability [64]. In contrast, the demonstration of photonic integrated architectures for all-optical signal processing are more challenging and only a few approaches seem to have reached the scale of a non-linear integrated circuit [65][66][67][68][69].…”

“…Interleaving techniques enable to scale the sampling rate up, while keeping the same clock frequency [70]. In wavelength-interleaved systems, consecutive sampling pulses have different central wavelengths, and the corresponding samples can be switched to different outputs using a wavelength demultiplexer [62]. In time-interleaved devices, as illustrated in Figure 11A, each sampling gate sees the signal to be sampled with a different time delay, obtaining as many samples in a single period of the clock (with one different output for each gate).…”

Integrated optical delay lines: a review and perspective [Invited]

“…The TDM combined with wavelength-division multiplexing (WDM) can be used to increase the repetition rate of an input optical pulse train [26,27] . The high-speed pulse train is highly required in photonic analog-to-digital conversion (PADC) to increase the sampling rate.…”

“…The high-speed pulse train is highly required in photonic analog-to-digital conversion (PADC) to increase the sampling rate. Figure 5 illustrates a four-channel time-wavelength optical pulse interleaver implemented on a silicon chip [27] . The input/ output wavelength (de)multiplexer is implemented by arrays of microring resonator filters, and the delay lines are realized by long sections of silicon waveguides.…”

“…. Four-channel pulse interleaver using WDM-TDM implemented on a silicon chip [27] . COL 16 (10), 101301(2018) CHINESE OPTICS LETTERS October 10, 2018…”