An island formation method for fabrication of a miniaturized CAAC‐OS FET has been developed. With our etching process, the CAAC‐OS FET, which has a gate length as small as 6.5 nm, had a high on‐off drain current ratio. The high‐definition display had excellent characteristics of a low lateral leakage current.

In this paper, we fabricate a 1.50‐inch, 3207‐ppi prototype OLED display with drivers capable of 32‐division driving, which is achieved by monolithically stacking CAAC‐OS FETs over SiFETs. This structure enables a narrow bezel and two‐dimensional driver arrangement, leading to independent driving of 32 pixel arrays with divided source and gate lines.

Hardware is required to be further miniaturized aiming at advancement of the Internet of things and artificial intelligence. Widely used Si transistors, which have achieved miniaturization on the order of 10 nm, are apparently difficult to further miniaturize, and stacking techniques have been developed as a breakthrough. Our IGZO FETs have a gate length of 6.8 nm or less owing to the wide band gap of IGZO and an optimized transistor structure, and can be highly integrated by a contact formation technique.

No abstract