A new analogue circuit design methodology using independently optimised self-cascode (SC) structures is proposed. Based on the concept of the dual-workfunction-gate structures, which are equivalent to SC structures, transconductance and output resistance optimised SC MOSFETs were used in the differential input and output stages, respectively. An operational amplifier (opamp) with the proposed design methodology using standard 0.18 µm CMOS technology was designed to provide better performance. The measured DC gain of the fabricated opamp with independently-optimised SC MOSFETs was approximately 12 dB higher than that of the conventional opamp.

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A high-voltage extended drain MOS (EDMOS) transistor with a dual work function gate (DWFG) is discussed. This device enhances device performance by modifying the electric field in the channel. For DWFG EDMOS device fabrication, the polycrystalline silicon gates on the source and drain sides are doped by p + and n + ion implantation, respectively. Experimental results from the fabricated DWFG EDMOS devices show improved transconductance (g m), drain conductance (g ds) and specific on-resistance (R ON) characteristics without breakdown voltage reduction.

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