This paper proposes a reconfigurable sensor analog front-end using low-noise chopper-stabilized delta-sigma capacitance-to-digital converter (CDC) for capacitive microsensors. The proposed reconfigurable sensor analog front-end can drive both capacitive microsensors and voltage signals by direct conversion without a front-end amplifier. The reconfigurable scheme of the front-end can be implemented in various multi-mode applications, where it is equipped with a fully integrated temperature sensor. A chopper stabilization technique is implemented here to achieve a low-noise characteristic by reducing unexpected low-frequency noises such as offsets and flicker noise. The prototype chip of the proposed sensor analog front-end is fabricated by a standard 0.18-μm 1-poly-6-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) process. It occupies a total active area of 5.37 mm2 and achieves an effective resolution of 16.3-bit. The total power consumption is 0.843 mW with a 1.8 V power supply.

A fully differential multipath current-feedback instrumentation amplifier (CFIA) for a resistive bridge sensor readout integrated circuit (IC) is proposed. To reduce the CFIA’s own offset and 1/f noise, a chopper stabilization technique is implemented. To attenuate the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. A multipath architecture is implemented to compensate for the notch in the chopping frequency band of the transfer function. To prevent performance degradation resulting from external offset, a 12-bit R-2R digital-to-analog converter (DAC) is employed. The proposed CFIA has an adjustable gain of 16–44 dB with 5-bit programmable resistors. The proposed resistive sensor readout IC is implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. The CFIA draws 169 μA currents from a 3.3 V supply. The simulated input-referred noise and noise efficiency factor (NEF) are 28.3 nV/√Hz and 14.2, respectively. The simulated common-mode rejection ratio (CMRR) is 162 dB, and the power supply rejection ratio (PSRR) is 112 dB.

This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 µA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/ √ Hz, respectively.

A nanoresonator can be applied as a biochemical sensor based on the change in the mass of the nanoresonator, and the mass change can be interpreted in the frequency domain. In this paper, we present an open-loop spectrum analyzer integrated circuit (IC) for a nanoresonator. The circuit determines the frequency characteristics of a nanoresonator, such as quality factor (Q-factor) and resonant frequency, and detects minute resistance changes of the nanoresonator that result in changes in Q-factor or resonant frequency. The proposed nanoresonator driver circuit is implemented using an open-loop system, and to characterize the open-loop frequency response of the nanoresonator, the IC includes a voltage-controlled oscillator, a transimpedance amplifier, and a 16-bit delta-sigma analog-to-digital converter. To compensate for the parasitic components that cause the distortions of the phase and magnitude response, a shunt-capacitance cancelling amplifier is used to cancel the effect of the shunt-parasitic capacitance of the nanoresonator. The simulated target nanoresonator is modeled using the Butterworth-Van Dyke equivalent circuit model with a resonant frequency of 10 MHz. The proposed nanoresonator driver circuit is fabricated using a standard 0.18 μm complementary metal oxide semiconductor process with an active area of 2.346 mm 2. The simulated resistive sensitivity of the IC is 5.1 mV/kΩ.

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