A bit-cost scalable (BiCS) NAND flash memory with a bulk erasing method is investigated in view of cell characteristics and uniformity. The proposed cell array has an additional electrode layer for a bulk erase operation in the middle of a vertical channel string cell. Here, under a bias condition of 20 V, a programming threshold voltage of 4.2 V at 1 ms and an erasing threshold voltage of V th = -1.5 V at 10 ms are confirmed, which is acceptable for flash memories. Furthermore, the shielding transistor close to an erase electrode is also investigated, which gives better erase characteristics for the cells adjacent to the erase electrode. From this result, we expect that a bulk erasable-BiCS technology with a shielding transistor can be a candidate three-dimensional (3D) NAND flash memory.

We construct a kink solution on a non-BPS D-brane using Berkovits' formulation of superstring field theory in the level truncation scheme. The tension of the kink reproduces 95% of the expected BPS D-brane tension. We also find a lump-like solution which is interpreted as a kink-antikink pair, and investigate some of its properties. These results may be considered as successful tests of Berkovits' superstring field theory combined with the modified level truncation scheme.

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