Pixel detectors at HL-LHC experiments or other future experiments are facing new challenges, especially in terms of unprecedented levels of radiation and particle flux. This paper describes the progress made by the CHIPIX65 project of INFN for the development of a new generation readout ASIC using CMOS 65 nm technology.

A: This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5-800 Mrad. Small prototypes of 64 × 64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. The collaboration is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.

Total ionizing dose (TID) effects in Si-based tunnel fi- nite element transfers (FETs) were investigated for the first time. Under 10-keV X-ray irradiation environment, along with the in- crease in total dose, a shift of the transfer characteristics and an increase in the interface trap density could be observed. After ir- radiation at 1 Mrad (SiO2) (and higher dose), the threshold voltage and the band-to-band tunneling conduction were only modestly affected, despite the thick buried oxide (140 nm). In contrast, under the same bias and irradiation environment, a FDSOI nMOSFET fabricated with a similar process presented a more severe degradation, suggesting the robustness of TFETs against TID effects. The underlying mechanism was explored through device simulation and ascribed to be due to the peculiarity of the doping structures of TFETs