Interconnect development for the new technology node requires coordinated efforts of multiple module teams working to co-optimize patterning and metallization solutions to meet performance and yield, and reliability targets. This paper presents the results of interconnect patterning optimization to improve overlay and process window control using a novel methodology, Design-for-Inspection™ (DFI). Using design-assisted voltage contrast measurement techniques, the method enables in-line test and monitoring of process induced overlay and CD variation of back-end-of line (BEOL) features built with litho-etch-litho-etch (LELE) patterning. While only some of the features of multi-color patterning scheme are chosen to be aligned directly, other combination of metal line and via colors may have uncontrolled misalignment risking open or short failures. The paper shows how the complete metrology coverage of multi-color combinations between dual patterned via and dual patterned metal lines helps driving the improvement of overlay and process margins in 14nm technology. The optimized process margin for via opens enables higher yields and better reliability.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.