The monolithic growth of III-V materials directly on Si substrates provides a promising integration approach for passive and active silicon photonic integrated circuits (PICs) but still faces great challenges in crystal quality due to misfit defect formation. Nano-ridge engineering (NRE) is a new approach which enables the integration of III-V based devices on trench-patterned Si substrates with very high crystal quality. Using selective area growth (SAG) III-V material is deposited into narrow trenches to reduce the dislocation defect density by aspect ratio trapping (ART). The growth is continued out of the trench pattern and a box-shaped III-V nano-ridge is engineered by adjusting the growth parameters. A flat (001) GaAs nano-ridge surface enables the epitaxial integration of a common InGaAs/GaAs multi-quantum-well (MQW) structure as an optical gain medium to build a laser diode. In this study a clear correlation is found between the photoluminescence (PL) lifetime, extracted from time-resolved photoluminescence (TRPL) measurements, with the InGaAs/GaAs nano-ridge size and defect density, which are both predefined by the nano-ridge related pattern trench width. Through addition of an InGaP passivation layer, a MQW PL lifetime of up to 800 ps and 1000 ps is measured, when pumped at 900 nm (QWs only excited) and 800 nm (QWs + barrier excited) respectively. Addition of a bottom carrier blocking layer further increases this lifetime to ∼ 2.5 ns (pumped at 800 nm), which clearly demonstrates the high crystal quality of the nano-ridge material. These TRPL measurements not only deliver a quick and valuable feedback about the III-V material quality but also provide an important understanding for the heterostructure design and carrier confinement of the nano-ridge laser diode.