High carbon concentrations at distinct regions at thermally-grown SiO2/6H–SiC(0001) interfaces have been detected by electron energy loss spectroscopy (EELS). The thickness of these C-rich regions is estimated to be 10–15 Å. The oxides were grown on n-type 6H–SiC at 1100 °C in a wet O2 ambient for 4 h immediately after cleaning the substrates with the complete RCA process. In contrast, C-rich regions were not detected from EELS analyses of thermally grown SiO2/Si interfaces nor of chemical vapor deposition deposited SiO2/SiC interfaces. Silicon-rich layers within the SiC substrate adjacent to the thermally grown SiO2/SiC interface were also evident. The interface state density Dit in metal–oxide–SiC diodes (with thermally grown SiO2) was approximately 9×1011 cm−2 eV−1 at E−Ev=2.0 eV, which compares well with reported values for SiC metal–oxide–semiconductor (MOS) diodes that have not received a postoxidation anneal. The C-rich regions and the change in SiC stoichiometry may be associated with the higher than desirable Dit’s and the low channel mobilities in SiC-based MOS field effect transistors.

Heteroepitaxial films of Ga 2 O 3 were grown on c-plane sapphire (0001). The stable phase β-Ga 2 O 3 was grown using the metalorganic chemical vapor deposition technique, regardless of precursor flow rates, at temperatures between 500 • C and 850 • C. Metastable α-and ε-phases were grown when using the halide vapor phase epitaxy (HVPE) technique, at growth temperatures between 650 • C and 850 • C, both separately and in combination. XTEM revealed the better lattice-matched α-phase growing semi-coherently on the substrate, followed by ε-Ga 2 O 3 . The epitaxial relationship was determined to be [1100] IMPACT STATEMENTThis study demonstrates one of the first epitaxial growths of multiple polymorphs of Ga 2 O 3 on sapphire (0001) substrates, including its β-, α-, and ε-phases. Epitaxial relationship is confirmed through HRTEM. ARTICLE HISTORY

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The specific contact resistance of an ohmic contact will be discussed including ways to calculate and measure this parameter. Ohmic contacts to n‐ and p‐type hexagonal SiC will then be detailed. Low resistance n‐type ohmic contacts are predominately fabricated by annealing a refractory metal, thereby forming a silicide with a lowered Schottky barrier height at the metal–SiC interface. P‐type contacts on the other hand generally use Al or Al alloys which upon annealing enable Al to diffuse into the SiC thus resulting in ohmic properties. Aluminium alloys however suffer from many problems which will be discussed. Other novel contacting schemes to p‐type SiC will also be reviewed.

Schottky diodes based on (2¯01) β-Ga2O3 substrates and (010) β-Ga2O3 homoepitaxial layers were formed using five different Schottky metals: W, Cu, Ni, Ir, and Pt. Based on a comparison of the effects of different wet chemical surface treatments on the Ga2O3 Schottky diodes, it was established that a treatment with an organic solvent, cleaning with HCl and H2O2, and rinsing with deionized water following each step yielded the best results. Schottky barrier heights calculated from current–voltage (I-V) and capacitance–voltage (C-V) measurements of the five selected metals were typically in the range of 1.0–1.3 and 1.6–2.0 eV, respectively, and showed little dependence on the metal work function. Several diodes also displayed inhomogeneous Schottky barrier behavior at room temperature. The results indicate that bulk or near-surface defects and/or unpassivated surface states may have a more dominant effect on the electrical behavior of these diodes compared to the choice of Schottky metal and its work function.