We report on our work on the double electron layer tunneling transistor (DELTT), based on the gate-control of two-dimensional --two-dimensional (2D-2D) tunneling in a double quantum well heterostructure. While previous quantum transistors have typically required tiny laterally-defined features, by contrast the DEL'IT is entirely planar and can be reliably fabricated in large numbers. We use a novel epoxy-bond-and-stop-etch (EBASE) flip-chip process, whereby submicron gating on opposite sides of semiconductor epitaxial layers as thin as 0.24 microns can be achieved. Because both electron layers in the DELTT are 2D,the resonant tunneling features are unusually sharp, and can be easily modulated with one or more surface gates. We demonstrate DELTTs with peak-to-valley ratios in the source-drain I-V curve of order 20:1 below 1 K. Both the height and position of the resonant current peak can be controlled by gate voltage over a wide range. DELTTs with larger subband energy offsets (-21 meV) exhibit characteristics that are nearly as good at 77 K, in good agreement with our theoretical calculations. Using these devices, we also demonstrate bistable memories operating at 77
DISCLAIMERThis report was prepared as an account of work sponsored by an agency of the United States Government. Neither the United States Government nor any agency thereof, nor any of their employees, make any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific commercial product, process, or service by trade name, trademark, manufacturer, or otherwise does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States Government or any agency thereof. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Government or any agency thereof.
DISCLAIMERPortions of this document may be illegible in electronic image products. Images are produced from the best available original document.
2
K.in gain, and high-speed.Finally, we briefly discuss the prospects for room temperature operation, increases 3
INTRODUCTIONElectronic devices based on resonant tunneling in semiconductor heterostructures have seen considerable effort ever since Tsu and Esaki' proposed the double barrier resonant tunneling diode (DBRTD) in 1973. The device was shortly thereafter demonstrated by Chang, Esaki, and Tsu2. In the DBRTD, typically grown in the GaAs/Al,Ga,-,As material system, electrons in a three-dimensional (3D) emitter layer can pass into a 3D collector layer only by first resonantly tunneling through two-dimensional (2D) electron states which are confined in a quantum well (QW) between two narrow barriers. To first order, electrons can tunnel only when their energy and in-plane momentum are conserved3. As a voltage is applied between the emi...