This paper presents a fast and accurate motion estimation algorithm. To obtain accurate motion vectors while minimizing computational complexity, we adjust the search range for each frame and each block to suit the motion level of the video. An appropriate search range for each frame is determined on the basis of motion vectors and prediction errors obtained for the previous frame. At each block, the search range is determined on the basis of the search range of its frame and of the motion vector values of all adjacent blocks for which those values have already been obtained. With our algorithm, since narrow search ranges are chosen for areas in which little motion occurs, computational complexity can be reduced without degrading estimation accuracy. Since wide search ranges are chosen for areas of significant motion, good video-quality encoding can be maintained. In the encoding of an SDTV size video, the addition of range adjustment results in a reduction in the computational complexity of motion estimation of roughly 65%, while maintaining the same video quality.

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We have developed a new-generation, general-purpose digital signal processor (DSP) core with low power dissipation for use in third-generation (3G) mobile terminals. The DSP core employs a 4-way VLIW (very long instruction word) approach, as well as a dual-multiply-accumulate (dual-MAC) architecture with good orthogonality. It is able to perform both video and speech codec for 3G wireless communications a t 384 k bidsec with a power consumption of approximately 50 mW. This paper presents an overview of both the DSP core architecture and a DSP instruction set, and it also gives some application benchmarks.

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