Articles you may be interested inQuantitative characterization of interface traps in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electronmobility transistors by dynamic capacitance dispersion technique Appl. Phys. Lett. 103, 033510 (2013); 10.1063/1.4813912 Study of gate oxide traps in HfO2/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors by use of ac transconductance method A comprehensive analytical model for threshold voltage calculation in GaN based metal-oxide-semiconductor high-electron-mobility transistors Appl. Phys. Lett. 100, 113509 (2012); 10.1063/1.3694768 Effect of gate orientation on dc characteristics of Si-doped, nonpolar AlGaN/GaN metal-oxide semiconductor high electron mobility transistors Appl. Phys. Lett. 95, 082110 (2009); 10.1063/1.3216576Self-heating simulation of GaN-based metal-oxide-semiconductor high-electron-mobility transistors including hot electron and quantum effects

Oxide/semiconductor interface trap density (Dit) and net charge of Al2O3/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. Dit distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher Dit (∼5–8 × 1012 eV−1 cm−2) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (Dit ∼ 2–3 × 1012 eV−1 cm−2) where the GaN cap was selectively etched away. Dit distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high Dit (>1013 eV−1 cm−2) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher Dit centered about EC-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al2O3 thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

Self-aligned normally-off n þþ GaN/InAlN/AlN/GaN MOS HEMTs with a recessed gate show scalable threshold voltage between 1.3 to 3.7 V, which increases with the gate oxide thickness. Al 2 O 3 or HfO 2 gate insulators were grown by ALD at 100 8C so that one photoresist mask could be used for the gate recessing, ALD and metal lift-off. A low density of the barrier surface donors $1 Â 10 13 cm À2 stems from the low thermal budged during the HEMT processing and explains the threshold voltage behaviour. Maximal I DS reaches $0.4 A/mm despite 2-mm gate length and 8-mm source-to-gate distance invariant to the threshold voltage. It is shown that for the present device Al 2 O 3 provides better gate insulation than HfO 2 , however, the latter may be more appropriate for highly scaled short gate-length HEMTs.Schematic picture of the self-aligned InAlN/GaN MOS HEMT.