Single-wall carbon nanotubes (SWNTs) were used to augment the thermal transport properties of industrial epoxy. Samples loaded with 1 wt% unpurified SWNT material show a 70% increase in thermal conductivity at 40K, rising to 125% at room temperature; the enhancement due to 1 wt% loading of vapor grown carbon fibers is three times smaller. Electrical conductivity data show a percolation threshold between 0.1 and 0.2 wt% SWNT loading. The Vickers hardness rises monotonically with SWNT loading up to a factor of 3.5 at 2 wt%. These results suggest that the thermal and mechanical properties of SWNT-epoxy composites are improved, without the need to chemically functionalize the nanotubes. a) present address:
We have fabricated air-stable n-type, ambipolar carbon nanotube field effect transistors (CNFETs), and used them in nanoscale memory cells. N-type transistors are achieved by annealing of nanotubes in hydrogen gas and contacting them by cobalt electrodes. Scanning gate microscopy reveals that the bulk response of these devices is similar to gold-contacted p-CNFETs, confirming that Schottky barrier formation at the contact interface determines accessibility of electron and hole transport regimes. The transfer characteristics and Coulomb Blockade (CB) spectroscopy in ambipolar devices show strongly enhanced gate coupling, most likely due to reduction of defect density at the silicon/silicon-dioxide interface during hydrogen anneal. The CB data in the "on"-state indicates that these CNFETs are nearly ballistic conductors at high electrostatic doping. Due to their nanoscale capacitance, CNFETs are extremely sensitive to presence of individual charge around the channel. We demonstrate that this property can be harnessed to construct data storage elements that operate at the few-electron level.
This Letter focuses on the role of contacts and the influence of Schottky barriers on the switching in nanotransistors. Specifically, we discuss (i) the mechanism for injection from a three-dimensional metal into a low-dimensional semiconductor, i.e., the competition between thermionic emission and thermally assisted tunneling, (ii) the factors that affect tunneling probability with emphasis on the importance of the effective mass for transistor applications, and (iii) a novel approach that enables determination of barrier presence and its actual height.
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