It is well known that there are many arsenic precipitates in LEC GaAs, t h e dimensions of which are 500-2000A. W e have recently found that these arsenic precipitates affect the device properties of chloride epitaxial-type MESFETS. They also affect t h e formation of small surface oval defects on MBE layers. To reduce the density of these arsenic precipitates, a multiple-wafer-annealing ( M W A ) technology has been developed in which wafers are annealed first at 1100°C and then at 950°C. By this annealing, highly uniform substrates with low arsenic precipitate densities, uniform PL and CL, uniform microscopic resistivity distributions and uniform surface morphology after AB etching can be obtained. These MWA wafers showed low threshold voltage variations for condensed ion-implantation-type MESFETS. In t h e present paper recent works are reviewed and the mechanism of arsenic precipitation is discussed from the viewpoint of stoichiometry.

Epitaxial layers were grown on semi-insulating LEC GaAs substrates by the chloride CVD technique and depletion type MESFET's with a gate length of 0.5 am have been fabricated on these epitaxial layers. Correlation between the FET device performance and the substrate quality has been studied. It was found that the substrate quality largely affects the device performance. Dislocations of the substrate had no definite effect on the device performance, while the density of the precipitate-like microscopic defects revealed by AB solution had a decisive effect on the device performance and the uniformity. We have examined LEC GaAs substrates with various density of etch pits revealed by AB solution (AB-EPD) but with nearly the same order of dislocation density revealed by KOH etching. The AB-EPD ranged from less than 104 to 5 • 105 cm 2, while the average dislocation density was in the range of 1-3 z 10 4 cm -2. The standard deviation of the gm compression over 2 in. ~ wafers was very small in the case of low AB-EPD wafers, while it was very large in the case of high AB-EPD wafers. When the substrate with FETs was etched by AB solution after the device performance measurement, it became evident that FETs with several AB etch pits under the gate area exhibited lower performance. It was also found that the photoluminescence intensity and its distribution over the substrate corresponded with the etch pit pattern generated by the AB solution.

No abstract

No abstract