Junctionless (JL) devices were fabricated using focused ion beam (FIB) system for Si milling (to define the Si nanowire (SiNW)) and for gate dielectric (SiO 2 ), gate, drain and source electrode (Pt) deposition. Energy dispersive spectroscopy (EDS) measurements confirmed the presence of Ga + into SiNW. The influence of Ga + incorporation into SiNW, due to Si milling, was studied in this work. Electrical measurements results indicate that the Ga + incorporation can affect the SiNW properties (doping concentration), and consequently, the JL performance (distortions on electrical characteristics). In addition, the simulated JL transistors (considering the Ga + incorporation) results are in good agreement with the electrical characteristics extracted from the fabricated JL devices. Therefore, the experimental results indicate that our fabrication method using FIB system can be used to obtain prototypes of JL devices.