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The overall ooeration of a Direct Dipital Freauencv -. , Synthesizer (DDFS) is bared on a look up table merhod. which perfirms funcriunal mapping from phase to sine amplitude. The specrral puriry of the conventional DDFS is determined by the resolurion of rhe values stored in the sine ruble ROM However, large ROM storage means higher power consumption. lower reliability, lower speed and increased costs. The novel design and implementation of a DDFS. with reduced memory size, is inrroduced Using new technique, rhe resulting architecture can be realized by smaller number of gores (i.e. less hardware complexiry) than exisring ones. Describing rhe proposed architecture, with the hardware description language VHDL, we can generate plethora of alrernative realizariuns in terms of rhe number of inpurs and output bits, the memory size, rhe number of gores, the memory segmentafion parameters, and rhe specfral purity In orher word, rhe designer can perform extensive archirecfure explorarion lo reach hisher oprimal solution.

SUMMARYThe design and hardware implementation of a multi-carrier Gaussian minimum shift keying (GMSK) modulator, based on a direct digital synthesizer, suitable for global system for mobile (GSM) base station applications is described. The synthesizer does not only generate the baseband GMSK signal, but also delivers it at a low IF. Special care has been taken in order to minimize the required memory of the synthesizer. The hardware implementation is mainly based on a field programmable gate array device (FPGA) and a D/A converter. The number of carriers depends on the size of the FPGA. Finally, the hardware implementation of a two-carrier modulator is given.