Ultralarge sale integrated circuit designs require multiple metal wiring layers for the formation of the device interconnections. Surface planarization and the deposition of high quality insulating films are critical fabrication steps related to the manufacture of these circuits. Planarization and dielectric deposition can be accomplished simultaneously using a spin-on process with hydrogen silsesquioxane (HSQ) resin to deposit amorphous SiO:H dielectric films. The use of this material in device manufacturing has increased as a result of the material's good planarization properties, eliminating the need for etchback procedures. More recently, it has been observed that HSQ-based films also provide the added benefit of relative permittivity less than SiO.,, which helps to minimize electrical delay. In order to obtain optimum properties from this material, tight process control and knowledge of the material's chemical behavior are necessary. Studies of the precursor material, film formation, and film properties have been performed. Also it is found that structural and compositional changes in the precursor during the film forming process play an important role in establishing the beneficial properties observed in HSQ-based dielectric films. InfroductionThe deposition of silicon dioxide thin films is a key step in the manufacture of semiconductor integrated circuits (ICs). Historically, ion beam sputtering and chemical vapor deposition have been used to deposit films in the 0.01 to 1.0 tim thickness range on dielectric, metal, and semiconductor surfaces. As circuit performance requirements have increased, the transistor density increased and the dimensions of the active device regions and circuit interconnections dropped well below 1.0 p.m. In these designs, multiple metal interconnection layers are essential. Today, IC designs with greater than three metal interconnection layers are common, and some microprocessors have as many as five levels. A common fabrication procedure for multilevel metal interconnection technology is the deposition of oxide films by spin coating silicon-based polymer solutions. The spin coating process planarizes the local wafer topography and facilitates the formation of void-free dielectric material between adjacent metal layers. Solutions of hydrogen silsesquioxane resin have emerged as a promising technology for the formation of planarizing oxide films. Oxide formation using this material has been shown to produce excellent local planarization and gap f ill1'2 and provides the added benefit of a dielectric constant lower than standard SiO,.Lower dielectric constant materials lower the capacitance between adjacent metal interconnections, in turn reducing electrical delay and paving the way to higher information processing rates.Hydrogen silsesquioxane (HSQ) resin is the polymeric analog of a family of spherosiloxanes previously explored by Five and Collins.5 These spherosiloxanes are highly ordered oligomers whose structure resembles a cage. The

Heteroepitaxial growth of 3C‐SiC on Si by chemical vapor deposition has been investigated using the precursor trimethylsilane. To optimize the growth process and to obtain high growth rates, we have investigated the effect of temperature and precursor flow rate on on‐axis Si(100) and off‐axis Si(111) substrates. High growth rates, in excess of 30 μm/h, have been obtained. Growth on carbonized Si(111) substrates produces a smoother surface morphology compared to films grown on noncarbonized substrates. Growth of thicker SiC films was carried out on carbonized off‐axis Si(111) substrates with a growth rate of ∼20 μm/h at 1200°C and 10 sccm of trimethylsilane. The resulting SiC films were 6–7 μm thick, crack‐free, and highly crystalline. This reveals the possibility for the application of these SiC films as “pseudosubstrates” and also for SiC‐on‐Si microelectromechanical structures which can withstand high temperature and corrosive environments. © 1999 The Electrochemical Society. All rights reserved.

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Observations have been made, using synchrotron white beam x-ray topography, of stacking faults in 4H–SiC with fault vectors of kind 1/6⟨202¯3⟩. A mechanism has been postulated for their formation which involves overgrowth by a macrostep of the surface outcrop of a c-axis threading screw dislocation, with two c/2-height surface spiral steps, which has several threading dislocations of Burgers vector c+a, with c-height spiral steps, which protrude onto the terrace in between the c/2-risers. Such overgrowth processes deflect the threading dislocations onto the basal plane, enabling them to exit the crystal and thereby providing a mechanism to lower their densities.

Low-pressure chemical vapor deposition of SiC on carbonized Si from the single-source organosilane precursor silacyclobutane (c-C3H6SiH2,SCB) has been investigated from 800 to 1200 °C. On atmospheric pressure-carbonized (100)Si, SiC films grown at 900 °C and above exhibit a transmission electron diffraction pattern consisting only of sharp spots with cubic symmetry. X-ray diffraction (XRD) of these films exhibit primarily the (200) and (400) SiC lines. XRD of films grown at 900 °C on Si(111) exhibits only an extremely large SiC(111) peak with a full width at half-maximum of 450 arcsec. Using a SCB flow rate of 1 sccm, a SiC growth rate of 4–5 μm/h was obtained on Si at 900 °C. Crystalline SiC films have also been grown by SCB at a temperature of 800 °C.