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This paper presents a novel architecture for realizing the synchronized-switch-harvesting-on-capacitors (SSHC) technique used for enhanced energy extraction from piezoelectric transducers. The proposed architecture allows full integration by utilizing the storage capacitor already present in most energy harvesting systems. A promising circuit implementation of the technique, named multilevel synchronized-switch harvesting on capacitors (ML-SSHC), is proposed as well, and its performance is analyzed theoretically. On the basis of that, a fully integrated and power-efficient transistor-level design in 0.18-µm CMOS is presented and fabricated in a prototype chip. When operating at a mechanical excitation frequency of 22 Hz and delivering between 1.51 µW and 4.82 µW, the measured increase in extracted power is 7.01× and 6.71×, respectively, relative to an ideal full-bridge rectifier. While the performance is comparable to the state-of-the-art, this is the first implementation allowing full integration at such low frequencies without posing special requirements on the piezoelectric harvester.

This paper presents a micro-watt level energy harvesting system for piezoelectric transducers with a wide input voltage range. Many such applications utilizing vibration energy harvesting have a widely varying input voltage and need an interface that can accommodate both low and high input voltages in order to harvest as much energy as possible. The proposed system consists of two rectifiers, both implemented as negative voltage converters followed by active-diodes, and three switched-capacitor DC-DC converters to either step-up or step-down and regulate to the target voltage. The system has been implemented in a 0.18 lm CMOS process and the chip measures 3 mm 2 . Measurements show a low voltage drop across the rectifiers and high peak power efficiency of the DC-DC converters (68.7-82.2%) with an input voltage range of 0.45-5.5 V for the complete system. Used standalone, the DC-DC converters support input voltages between 0.5 and 11 V while maintaining an output voltage of 1.8 V at an output power of 16.2 lW. The ratio of each converter is selectable to be either 1:2, 1:3, or 1:4.

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Abstract-MEMS-based piezoelectric energy harvesters are promising energy sources for future self-powered medical implant devices, low-power wireless sensors, and a wide range of other emerging ultra-low-power applications. However, the small form factors and the low vibration frequencies can lead to very low (in µW range) harvester output power. This makes the design of integrated CMOS rectifiers a challenge, ultimately limiting the overall power efficiency of the entire power management system. This work investigates two different fully integrated rectifier topologies, i.e. voltage doublers and full bridges. Implemented in 0.35-µm, 0.18-µm, and 65-nm CMOS technologies, the two rectifier architectures are designed using active diodes and crosscoupled pairs. These are then evaluated and compared in terms of their power efficiency and voltage efficiency for typical piezoelectric transducers in such ultra-low-power applications which generate voltages between 0.27-1.2 V. Furthermore, analytical expressions for the rectifiers are verified against circuit simulation results, allowing a better understanding of their limitations.