The need of higher yields on the wafermanufacturing environment is pushing the yield analysts to develop new techniques and tools for yield improvement. With this scope, we present SmartBitTM, a software tool that provides detailed information about yield limitors by correlating bitmap to in-line defect data in an automatic mode, expediting the yield leaming task.Based on the spatial correlation of bitmap data and the information of defects coming from the inline inspections, SmartBitTM provides a pareto where yield loss sources are separated and weighted by impact. SmartBitTM also offers detailed information about the killer defects (defect class, origin, size, kill ratio and more) into a set of reports specially designed to obtain an overall view about the main problems affecting the fab yield. This is the key to fast and efficient yield leaming. These reports are generated automatically using data from the full production of memory-products enhancing the reliability and completeness of the analysis.

Time to yield entitlement is known as one of the key issues for the new technology introduction and production ramp-up. The term "entitlement" refers to the target where a technology achieves maturity, that is consistently good performance in terms of yield. Within this scope, we present the strategy followed to "entitle" the 0.3 microns technology into our manufacturing line. Complementary approaches were simultaneously used to optimize the speed of the yield learning cycle: baseline yield analysis ( based on bitmap ), a line monitor program ( based in chips full of test structures ) and standard low yield failure analysis ( based on physical, electrical and software analysis ).The record times achieved for the yield entitlement have shown the efficiency of the approach. The paper gives the detail of the results obtained with each type of analysis and also how they were managed to implement corrective and preventive action plans in a fast way.

A wealth of advantages arise from breaking down the overall yield into yield components that are easier to work and closer to the manufacturing line environment. We present in this paper our strategy to attempt the 100% yield explanation on our fab and the process of building a pareto that quantities the impact of each yield component (defects, probe, nothing found, etc.. .). The most critical one, the defect related, is accounted by a set of knowledgebased automatic software tools that operate in our fab. They quantify it and break it down into the by layer, by defect size and type (ADC) contributions. The step forward of communication and deployment of this yield strategy is a key topic also discussed in the paper.On our way towards the 100 % understanding of yield we have leamed how to better manage it and taken advantage of many more opportunities to improve it. The strategy has shown to work both for new and mature technologies in our manufacturing line in Lucent Technologies Madrid.

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A wealth of advantages arise from breaking down the overall yield into yield components that are easier to work and closer to the manufacturing line environment. We present in this paper our strategy to attempt the 100% yield explanation on our fab and the process of building a pareto that quantifies the impact of each yield component (defects, probe, nothing found, etc. . .). The most critical one, the defect related, is accounted by a set of knowledge-based automatic software tools that operate in our fab. They quantify it and break it down into the by layer, by defect size and type (ADC) contributions. The step forward of communication and deployment of this yield strategy is a key topic also discussed in the paper. On our way towards the 100 % understanding of yield we have learned how to better manage it and taken advantage of many more opportunities to improve it. The strategy has shown to work both for new and mature technologies in our manufacturing line in Lucent Technologies Madrid.