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The current paper presents a large memory giving special emphasis to the architecture and suitability of the Linux OS for this type of applications. The system will be used on the joint european torus new correlation reflectometers composed by four microwave channels with four analogue signals each. All sixteen signals will be acquired by 12-bit VME fast acquisition channels at 2 Msamples/s achieving a total data rate of 60MB/s. Slower VME acquisition channels, with 16-bit resolution and sampling rates up to 250 ksamples/s, can also acquire these 16 signals. Two dedicated digital signal processors run an algorithm over this acquired data to avoid the use of the old KG8B root mean square analogue circuits as well as to control and to generate all the timing and acquisition clocks needed by the system.

A set of PCI instrumentation modules was developed at the EURATOM/IST Association. The modules were engineered around a reconfigurable hardware core which permits one to reduce the development time of instrument for new applications, provide support for long time or even continuous operation, and is able to perform real-time digital signal processing. The core was engineered at low cost and the modules incorporate a high number of channels, which contribute to reduce the total cost per channel. Field results are as expected in terms of performance both in data throughput and input characteristics. Currently, a 2 MSPS, 14-bit, eight channel galvanic isolated transient recorder; a 200 MSPS, 8-bit, four channel pulse digitizer; an eight channel time-to-digital-converter with a resolution of 0.4 ns, and a reconfigurable hardware expandable board, are implemented.

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An ATCA-based fast plant system controller was developed by IPFN to meet ITER's requirements. Timing synchronization and distribution for all hardware units in the ATCA shelf is implemented on a PCIe-based, AMC quad-carrier module that includes a timing switch. This hardware architecture allows for AMC COTS products to be rapidly integrated into the system, resulting in innumerous possibilities for PCIe host and ATCA/AMC clock source locations. For this purpose, timing distribution and synchronization is fully programmable. Each ATCA/AMC clock may originate from any physical location, to be distributed elsewhere within the ATCA shelf. This is achieved via firmware, implemented in a Virtex-6 Field Programmable Gate Array (FPGA). Firmware will also include IEEE-1588-2008 and White Rabbit over Ethernet support.