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A subsampling filter is proposed for a discrete-time receiver (DTR). This filter achieves signal discretisation, filtering and downconversion simultaneously. With the proposed subsampling filtering technique, the subsampling mixer in a conventional DTR is eliminated, which can reduce power, cost and noise. The first 2.4 GHz DTR prototype for Zigbee application is fabricated in a 0.18 μm CMOS process. It achieves 23 dB conversion gain, 17.6 dB noise figure and −15 dBm IIP3. Operated from a single 1 V supply, the low-noise amplifier and following filter stages consume only 3.8 mW and the total receiver power consumption is 25.6 mW.

This paper presents a dual-path noise-cancelling (DPNC) LNA, which is designed for low power wireless sensor network (WSN) applications and operates at 2.4GHz band. The proposed DPNC LNA can effectively cancel internal circuit noise while consuming less power by g m -boosted technique. The measured voltage gain and NF are 22dB and 3.7dB, respectively. IIP 3 is +8dBm and consumes 1.2mW with a 1.0V single supply. Fabricating in the 0.18ȝm standard CMOS process, the LNA occupies an active area of 0.3mm 2 .

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