A low power high reliability dual-path noise-cancelling LNA for WSN applications

Abstract

This paper presents a dual-path noise-cancelling (DPNC) LNA, which is designed for low power wireless sensor network (WSN) applications and operates at 2.4GHz band. The proposed DPNC LNA can effectively cancel internal circuit noise while consuming less power by g m -boosted technique. The measured voltage gain and NF are 22dB and 3.7dB, respectively. IIP 3 is +8dBm and consumes 1.2mW with a 1.0V single supply. Fabricating in the 0.18ȝm standard CMOS process, the LNA occupies an active area of 0.3mm 2 .

2.4 GHz discrete‐time receiver without subsampling mixer

“…In the LNA design, the dual-path noise-cancelling (DPNC) architecture is employed as shown in Fig. 3a [3]. The DPNC LNA not only eliminates the thermal noise contributed by transistors M g and M s , but also converts singleended input into differential outputs.…”