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We describe the design of an agile data center with integrated server and storage virtualization technologies. Such data centers form a key building block for new cloud computing architectures. We also show how to leverage this integrated agility for non-disruptive load balancing in data centers across multiple resource layers -servers, switches, and storage. We propose a novel load balancing algorithm called VectorDot for handling the hierarchical and multi-dimensional resource constraints in such systems. The algorithm, inspired by the successful Toyoda method for multi-dimensional knapsacks, is the first of its kind. We evaluate our system on a range of synthetic and real data center testbeds comprising of VMware ESX servers, IBM SAN Volume Controller, Cisco and Brocade switches. Experiments under varied conditions demonstrate the end-to-end validity of our system and the ability of VectorDot to efficiently remove overloads on server, switch and storage nodes.

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We propose an efficient dynamic slicing technique for aspect-oriented programs. We use a dependencebased intermediate program representation called extended aspect-oriented system dependence graph (EASDG) to represent aspect-oriented software. The EASDG of an aspect-oriented program consists of a system dependence graph (SDG) for non-aspect code, a group of dependence graphs for aspect code and some additional dependence edges used to connect the system dependence graph for non-aspect code to the dependence graphs for aspect code. Our dynamic slicing algorithm is based on marking and unmarking of the executed nodes in EASDG appropriately during run-time. In our approach, we do not use any trace file to store the execution history. Also, our approach does not create any additional nodes during run-time. We use the term node and vertex interchangeably in this paper.

In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundaries (GBs) result in significant yield loss, thereby impeding its wide deployment. In this paper, from a system and circuit design perspective, we propose a new self-repair design methodology to compensate the GB-induced variations for LTPS liquid crystal displays (LCDs) and active-matrix organic light emitting diode (AMOLED) displays. The key idea is to extend the charging time for detected low drivability pixel switches, hence, suppressing the brightness non-uniformity and eliminating the need for large voltage margins. The proposed circuit was implemented in VGA LCD panels which were used for prediction of power consumption and yield. Based on the simulation results, the proposed circuit decreases the required supply voltage by 20% without performance and yield degradation. 7% yield enhancement is observed for high resolution, large sized LCDs while incurring negligible power penalty. This technique enables LTPS-based displays either to further scale down the device size for higher integration and lower power consumption or to have superior yield in large sized panels with small power overhead.