IMPACT: IMPrecise adders for low-power approximate computing

Gupta, Rajiv; Mohapatra,; Park, Hae‐Sim; Raghunathan, Anand; Roy, Sanghamitra

doi:10.1109/islped.2011.5993675

Cited by 358 publications

(184 citation statements)

References 13 publications

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“…Definitions of EMs from the literature are given in Equations (2) to (7). Note that E[·] indicates the expected value of a random variable and max [·] indicates the maximum value.…”

Section: A Error Metricsmentioning

confidence: 99%

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Statistical analysis and modeling for error composition in approximate computation circuits

Chan

Kahng

Kang

et al. 2013

2013 IEEE 31st International Conference on Computer Design (ICCD)

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Abstract-Aggressive requirements for low power and high performance in VLSI designs have led to increased interest in approximate computation. Approximate hardware modules can achieve improved energy efficiency compared to accurate hardware modules. While a number of previous works have proposed hardware modules for approximate arithmetic, these works focus on solitary approximate arithmetic operations. To utilize the benefit of approximate hardware modules, CAD tools should be able to quickly and accurately estimate the output quality of composed approximate designs. A previous work [10] proposes an interval-based approach for evaluating the output quality of certain approximate arithmetic designs. However, their approach uses sampled error distributions to store the characterization data of hardware, and its accuracy is limited by the number of intervals used during characterization.In this work, we propose an approach for output quality estimation of approximate designs that is based on a lookup table technique that characterizes the statistical properties of approximate hardwares and a regression-based technique for composing statistics to formulate output quality. These two techniques improve the speed and accuracy for several error metrics over a set of multiply-accumulator testcases. Compared to the interval-based modeling approach of [10], our approach for estimating output quality of approximate designs is 3.75× more accurate for comparable runtime on the testcases and achieves 8.4× runtime reduction for the error composition flow. We also demonstrate that our approach is applicable to general testcases.

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“…Definitions of EMs from the literature are given in Equations (2) to (7). Note that E[·] indicates the expected value of a random variable and max [·] indicates the maximum value.…”

Section: A Error Metricsmentioning

confidence: 99%

“…In digital signal processing (DSP) circuits, the magnitude of errors is important because small errors may be masked by other noise sources. [7] are common metrics to measure signal degradation in communication and image processing systems.…”

Section: A Error Metricsmentioning

confidence: 99%

Statistical analysis and modeling for error composition in approximate computation circuits

Chan

Kahng

Kang

et al. 2013

2013 IEEE 31st International Conference on Computer Design (ICCD)

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show abstract

“…In [1][2][3][4], some approximate adders and approximate multipliers were studied and analyzed, elaboratively. In [2], in order to reduce the number of transistors and power consumption, an approximate mirror full-adder (AMA) was proposed. Then, this approximate full-adder was utilized in the JPEG algorithm.…”

Section: Introductionmentioning

confidence: 99%

High Performance 8-bit Approximate Multiplier using Novel 4:2 Approximate Compressors for Fast Image Processing

Ranjbar¹,

Forghani

Bahrepour³

2018

IJIE

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“…Initial attempts of inexact circuit design focused on manual redesign of common arithmetic building blocks [2] or the use of logic synthesis to generate approximate circuits [3] by selecting portions of a circuit and applying logic simplifications that do not impact more than one circuit output at a time. Other synthesis techniques achieving power reduction are based on selectively stopping the clock in portions of the circuit where active and exact computation is not required [4], or use precomputation based on sequential logic optimization like in [5].…”

Section: Introductionmentioning

confidence: 99%

“…For example, the need for exact results is not justified in applications that interact with human perception, such as vision and audition [1]. Thereby, exploiting approximate computing at the hardware level seems to be a relevant solution that can be applied to a range of applications in exchange for a higher energy efficiency.Initial attempts of inexact circuit design focused on manual redesign of common arithmetic building blocks [2] or the use of logic synthesis to generate approximate circuits [3] by selecting portions of a circuit and applying logic simplifications that do not impact more than one circuit output at a time. Other synthesis techniques achieving power reduction are based on selectively stopping the clock in portions of the circuit where active and exact computation is not required [4], or use precomputation based on sequential logic optimization like in [5].…”

mentioning

confidence: 99%

A fast pruning technique for low-power inexact Circuit design

Broc

Gaillardon

Amarù

et al. 2015

2015 IEEE 6th Latin American Symposium on Circuits &Amp; Systems (LASCAS)

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Abstract-Inexact Circuits are circuits in which the accuracy of the output can be traded for cost savings (energy, area and/or delay). In the context of advanced technology scaling and power density increase, inexact circuits appear to be very promising as a solution. In this paper, we present a novel pruning technique developed as a logic level method to select and prune parts of a digital circuit. The error is computed at each pruning step using probabilistic error propagation and Hamming distance computation, making the evaluation possible at runtime. The technique was validated on several parallel adder architectures. Experimental results proved the efficiency of the technique with Energy-Delay-Area product reduction of 1.8× for less than 10 −4 % of relative error on the considered benchmarks at 45-nm technology node. I. INTRODUCTIONIn the context of advanced technology scaling and power density increase, circuit design innovations are required to keep the power budget under control. Inexact or approximate circuit design is a computing solution that trades circuit precision for cost reduction. Cost can be energy, area and/or delay. Approximate solutions are already heavily used in the field of computer science, especially in the multimedia domain where systems can tolerate varying amounts of error and still realize useful computations. For example, the need for exact results is not justified in applications that interact with human perception, such as vision and audition [1]. Thereby, exploiting approximate computing at the hardware level seems to be a relevant solution that can be applied to a range of applications in exchange for a higher energy efficiency.Initial attempts of inexact circuit design focused on manual redesign of common arithmetic building blocks [2] or the use of logic synthesis to generate approximate circuits [3] by selecting portions of a circuit and applying logic simplifications that do not impact more than one circuit output at a time. Other synthesis techniques achieving power reduction are based on selectively stopping the clock in portions of the circuit where active and exact computation is not required [4], or use precomputation based on sequential logic optimization like in [5]. Lately, a concrete chip prototype [6] was developed employing a pruning technique. The chip implements an inexact 64-bit Kogge-Stone adder [6] and demonstrates a cost saving quantified through the Energy-Delay-Area Product (EDAP) of 1.2-1.6× with an acceptable error bound of less than 0.1% of relative error. Thus, inexact circuit proved their operational efficiency when result quality is not purely needed. Commonly used design techniques for inexact circuits prune, i.e., delete components of an exact logic circuit [7], [8]. At every pruning steps, critical components are selected and pruned in order to minimize the output error while maximizing the power reduction. This selection is typically based on two parameters: the significance, which measures the components impact on the output results and the act...

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IMPACT: IMPrecise adders for low-power approximate computing

Cited by 358 publications

References 13 publications

Statistical analysis and modeling for error composition in approximate computation circuits

Statistical analysis and modeling for error composition in approximate computation circuits

High Performance 8-bit Approximate Multiplier using Novel 4:2 Approximate Compressors for Fast Image Processing

A fast pruning technique for low-power inexact Circuit design

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