The TiO2∕SiO2 gate dielectric stack on 4H-SiC substrate has been studied as a high-κ gate dielectric for metal-oxide semiconductor devices. X-ray photoelectron spectroscopy confirmed the formation of stoichiometric TiO2 films. The leakage current through the stack layer was investigated and it has been shown to be a double conduction mechanism. At low fields, the current is governed by properties of the interfacial layer with a hopping like conduction mechanism, while at relatively high electric field, carriers are modulated by a trap assisted tunneling mechanism through traps located below the conduction band of TiO2. The current-voltage characteristics, time evolution of charge transport, and capacitance-voltage behaviors under constant voltage stressing suggest the composite effect of electron trapping and positive charge generation in the dielectric stack layer.

The structural and electrical characteristics of thermally oxidized Ti∕SiO2 gate dielectric stacks on 4H–SiC substrates have been investigated. X-ray photoelectron spectroscopy shows a good stoichiometry of TiO2 films formed by thermal oxidation of evaporated Ti. No evidence of the formation of titanium silicide at the surface as well as in the interfacial layer was observed. Electrical measurements show, in particular, no signature of an increase in interface state density towards the conduction band edge of 4H–SiC. The improved leakage current with higher breakdown field of 11MV∕cm makes TiO2∕SiO2 stacks a potential gate insulator for high-power SiC devices.

The use of high-k dielectrics in 4H-SiC devices has recently attracted interest from the point of view of investigating whether such materials offer enhanced channel conduction when incorporated into 4H-SiC MOSFETS. This study shows that there are benefits and disadvantages of high-k dielectrics beyond just possible enhancement of channel carrier mobility. It is shown that incorporation of high-k dielectrics causes the peak electric field in the forward blocking state to be inside the semiconductor as opposed to the gate oxide of a conventional device. It is also shown that high-k devices are limited by reasons of constraints on cell geometry optimisation to voltages about ~3kV and that parasitic capacitances within the high-k device are more sensitive to cell layout than in conventional oxide devices.

We have investigated the structural and electrical properties of thermally oxidized-Ti gate dielectric stacks on 4H-SiC films. In addition, SiO2 films were used as an interfacial layer between TiO2 films and 4H-SiC substrate. The TiO2 films were grown by oxidising evaporated Ti films at the temperature range of 700-1000 ºC for 1 hour. The films remain amorphous up to oxidation temperature of 900 ºC while oxidation at 1000 ºC transforms the film to be polycrystalline. X-ray photoelectron spectroscopy confirms the formation of stoichiometric TiO2 films. Capacitance-voltage characteristics exhibit the shift of flatband voltage attributing the presence of oxide charges. The TiO2/SiO2 4H-SiC capacitors in which Ti was oxidized at 800 ºC give the less fixed oxide charge density with moderate value of interface state density and less leakage current density.