Purpose The purpose of this paper is to propose a leakage reduction technique which will works for complementary metal oxide semiconductor (CMOS) and fin field effect transistor (FinFET). Power consumption will always remain one of the major concerns for the integrated circuit (IC) designers. Presently, leakage power dominates the total power consumption, which is a severe issue. It is undoubtedly clear that the scaling of CMOS revolutionizes the IC industry. Still, on the contrary, scaling of the size of the transistor has raised leakage power as one of the significant threats to the IC industry. Scaling of the devices leads to the scaling of other device parameters, which includes threshold voltage also. The scaling of threshold voltage leads to an exponential increase in the sub-threshold current. So, many leakage reduction techniques have been proposed by researchers for CMOS from time to time. Even the other nano-scaled devices such as FinFET, carbon nanotube field effect transistor and tunneling field effect transistor, have been introduced, and FinFET is the one which has evolved as the most favorable candidate for replacing CMOS technology. Design/methodology/approach Because of its minimum leakage and without having limitation of the short channel effects, it gradually started replacing the CMOS. In this paper, the authors have proposed a technique for leakage reduction for circuits using nano-scaled devices such as CMOS and FinFET. They have compared the proposed PMOS FOOTER SLEEP with the existing leakage reduction techniques such as LECTOR technique, LECTOR FOOTER SLEEP technique. The proposed technique has been implemented using CMOS and FinFET devices. This study found that the proposed method reduces the average power, as well as leakage power reduction, for both CMOS and FinFET devices. Findings This study found that the proposed method reduces the average power as well as leakage power reduction for both CMOS and FinFET devices. The delay has been calculated for the proposed technique and the existing techniques, which verifies that the proposed technique is suitable for high-speed circuit applications. The authors have implemented higher order gates to verify the performance of the proposed circuit. The proposed method is suitable for deep-submicron CMOS technology and FinFET technology. Originality/value All the existing techniques were proposed for either CMOS device or FinFET device, but the authors have implemented all the techniques with both the devices and verified with the proposed technique for CMOS as well as FinFET devices.

Since COVID-19 was released, online education has taken center stage. Educational performance analysis is a central topic in virtual classrooms and across the spectrum of academic institutions. This research analyzed students' studies in virtual learning using many machine-learning classifiers, which include LogitBoost, Logistic Regression, J48, OneR, Multilayer Perceptron, and Naive Bayes, to find the ideal one that produces the best outcomes. This research evaluates algorithms based on recall, precision, and f-measure to determine their efficacy. Accordingly, the authors try to perform a comparative analysis of the algorithms in this research by employing two distinct test models: the use of training sets and the 10 cross-fold models. The research results demonstrate that the training set model outperforms the 10 cross-fold model. The findings demonstrate that the multilayer perceptron classifier utilizing the use training set model performs much better in terms of predicting student study in virtual learning.

To maximize solar Photovoltaic (PV) output under dynamic weather conditions, Maximum Power Point Tracking (MPPT) controllers are incorporated in solar PV systems. Implementing the MPPT algorithm through digital controllers is easier if it is possible to minimize error functions. The differences between the various MPPT techniques are very slight and they can be evaluated according to the situation. In this work a modified version of adapative reference voltage algorithm has been designed. The model has been simulated in MATLAB/ SIMULINK environment. The modeling of adaptive reference PSO based MPPT algorithm has resulted in considerable improvement in the power output from the PV module. The power output with adaptive reference PSO MPPT algorithm at the load terminal has improved from 3959 Watts to 4969 watts approximately.

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